-
公开(公告)号：US09893438B1
公开(公告)日：2018-02-13
申请号：US15281814
申请日：2016-09-30
Applicant: Intel Corporation
Inventor： Sasha Oster , Adel A. Elsherbini , Feras Eid , Aleksandar Aleksov , Amit Sudhir Baxi , Johanna M. Swan , Vincent S. Mageshkumar
CPC classification number: H01R4/58 , A44B17/0041 , A44B19/24 , H01R13/03 , H01R43/26
Abstract: A system can include a first portion of a fabric fastener, a second portion of the fabric fastener, wherein the first portion and the second portion are configured to mechanically connect with each other and to resist separation from each other once connected, and wherein the first and second portions include a plurality of corresponding electrical contacts configured to form a plurality of individual electrical connections when the first portion is mechanically connected with the second portion.
-
公开(公告)号：US09820384B2
公开(公告)日：2017-11-14
申请号：US14102676
申请日：2013-12-11
Applicant: Intel Corporation
Inventor： Sasha Oster , Robert L. Sankman , Charles Gealer , Omkar Karhade , John S. Guzek , Ravi V. Mahajan , James C. Matayabas, Jr. , Johanna Swan , Feras Eid , Shawna Liff , Timothy McIntosh , Telesphor Kamgaing , Adel Elsherbini , Kemal Aygun
CPC classification number: H05K1/189 , G06F1/163 , H01L21/568 , H01L24/19 , H01L24/96 , H01L2224/04105 , H01L2224/12105 , H01L2224/24137 , H01L2924/12042 , H01L2924/181 , H01L2924/18162 , H05K1/0393 , H05K1/181 , H05K1/185 , H05K13/0469 , H05K2201/0137 , H05K2203/1469 , Y10T29/49146 , H01L2924/00
Abstract: This disclosure relates generally to devices, systems, and methods for making a flexible microelectronic assembly. In an example, a polymer is molded over a microelectronic component, the polymer mold assuming a substantially rigid state following the molding. A routing layer is formed with respect to the microelectronic component and the polymer mold, the routing layer including traces electrically coupled to the microelectronic component. An input is applied to the polymer mold, the polymer mold transitioning from the substantially rigid state to a substantially flexible state upon application of the input.
-
公开(公告)号：US09345184B2
公开(公告)日：2016-05-17
申请号：US14126271
申请日：2013-09-27
Applicant: Intel Corporation
Inventor： Sasha Oster , Sarah Haney , Weng Hong Teh , Feras Eid
IPC: H05K9/00 , H01L23/552 , H01L23/00 , B32B37/24 , B32B38/10 , B81B7/00 , B81B7/02 , G06F1/18 , H05K1/11 , H01L21/56
CPC classification number: H05K9/0052 , B32B37/24 , B32B38/10 , B32B2037/243 , B32B2457/00 , B81B7/0029 , B81B7/0032 , B81B7/02 , B81C1/0023 , G06F1/182 , H01L21/568 , H01L23/552 , H01L24/19 , H01L24/96 , H01L2224/04105 , H01L2924/12042 , H01L2924/14 , H01L2924/1434 , H01L2924/1461 , H05K1/115 , Y10T156/10 , H01L2924/00
Abstract: Magnetic field shielding material with high relative permeability incorporated into a build-up package, for example to restrict a field of a magnet integrated with the build-up to a target device configured to operate in the field. In embodiments, a first device is physically coupled to the build-up. In embodiments, a magnetic field shielding material is disposed in contact with the build-up and in proximity to the first device to restrict a magnetic field either to a region occupied by the first device or to a region exclusive of the first device. A field shielding material may be disposed within build-up near a permanent magnet also within the build-up to reduce exposure of another device, such as an IC, to the magnetic field without reducing MEMS device exposure.
Abstract translation: 具有高的相对磁导率的磁场屏蔽材料被并入到积聚封装中，例如将与积聚物集成的磁体的场限制到被配置为在现场操作的目标装置。 在实施例中，第一设备物理地耦合到建立。 在实施例中，磁场屏蔽材料设置成与积层接触并且靠近第一装置，以将磁场限制到由第一装置占据的区域或不包括第一装置的区域。 场屏蔽材料也可以在堆积物内的永磁体附近的堆积内设置，以减少诸如IC之类的其它器件（例如IC）的暴露，而不会降低MEMS器件的暴露。
-
公开(公告)号：US20240113052A1
公开(公告)日：2024-04-04
申请号：US18541878
申请日：2023-12-15
Applicant: Intel Corporation
Inventor： Telesphor Kamgaing , Adel A. Elsherbini , Sasha Oster
IPC: H01L23/66 , H01L21/48 , H01L23/498
CPC classification number: H01L23/66 , H01L21/4857 , H01L23/49822 , H01L23/49827 , H01L24/16
Abstract: In various embodiments, disclosed herein are systems and methods directed to the fabrication of a coreless semiconductor package (e.g., a millimeter (mm)-wave antenna package) having an asymmetric build-up layer count that can be fabricated on both sides of a temporary substrate (e.g., a core). The asymmetric build-up layer count can reduce the overall layer count in the fabrication of the semiconductor package and can therefore contribute to fabrication cost reduction. In further embodiments, the semiconductor package (e.g., a millimeter (mm)-wave antenna packages) can further comprise dummification elements disposed near one or more antenna layers. Further, the dummification elements disposed near one or more antenna layers can reduce image current and thereby increasing the antenna gain and efficiency.
-
公开(公告)号：US11476554B2
公开(公告)日：2022-10-18
申请号：US16613386
申请日：2017-07-01
Applicant: Intel Corporation
Inventor： Georgios Dogiamis , Sasha Oster , Telesphor Kamgaing , Erich Ewy , Adel Elsherbini , Johanna Swan
IPC: H01P3/16 , H01P5/02 , B60R16/023 , H01L23/66 , H01L25/18 , H01R13/622 , H01R13/631 , H01R13/646 , H05K1/18 , H05K5/00 , H05K5/02 , H05K7/20
Abstract: Embodiments of the invention include dielectric waveguides and connectors for dielectric waveguides. In an embodiment a dielectric waveguide connector may include an outer ring and one or more posts extending from the outer ring towards the center of the outer ring. In some embodiments, a first dielectric waveguide secured within the dielectric ring by the one or more posts. In another embodiment, an enclosure surrounding electronic components may include an enclosure wall having an interior surface and an exterior surface and a dielectric waveguide embedded within the enclosure wall. In an embodiment, a first end of the dielectric waveguide is substantially coplanar with the interior surface of the enclosure wall and a second end of the dielectric waveguide is substantially coplanar with the exterior surface of the enclosure wall.
-
Patent Agency Ranking
公开(公告)号：US10959633B2
公开(公告)日：2021-03-30
申请号：US15837508
申请日：2017-12-11
Applicant: Intel Corporation
Inventor： Amit Baxi , Adel Elsherbini , Vincent Mageshkumar , Sasha Oster , Aleksandar Aleksov , Feras Eid
IPC: A61B5/0408 , A61B5/01 , A61B5/026 , A61B5/0205 , A61B5/021 , A61B5/08 , A61B5/00
Abstract: Sensing patch systems are disclosed herein. A sensing patch system includes a flexible substrate and a sensor node. The flexible substrate includes one or more substrate sensors configured to provide sensor data, one or more substrate conductors electrically coupled to a corresponding substrate sensor to conduct the sensor data provided by the corresponding substrate sensor, and a node interface. The sensor node includes a substrate interface configured to receive the node interface of the flexible substrate. The sensor node is configured to receive the sensor data provided by the substrate sensors, process the sensor data, and communicate the processed sensor data to a remote device.
-
公开(公告)号：US10446461B2
公开(公告)日：2019-10-15
申请号：US15816681
申请日：2017-11-17
Applicant: Intel Corporation
Inventor： Sasha Oster , Adel A. Elsherbini , Joshua D. Heppner , Shawna M. Liff
IPC: H01L23/31 , H01L21/56 , H01L23/433 , H01L23/42 , H01L23/467
Abstract: Molded electronics package cavities are formed by placing a sacrificial material in the mold and then decomposing, washing, or etching away this sacrificial material. The electronics package that includes this sacrificial material is then overmolded, with little or no change needed in the overmolding process. Following overmolding, the sacrificial material is removed such as using a thermal, chemical, optical, or other decomposing process. This proposed use of sacrificial material allows for formation of complex 3-D cavities, and reduces or eliminates the need for precise material removal tolerances. Multiple instances of the sacrificial material may be removed simultaneously, replacing a serial drilling process with a parallel material removal manufacturing process.
-
公开(公告)号：US20190038170A1
公开(公告)日：2019-02-07
申请号：US15837508
申请日：2017-12-11
Applicant: Intel Corporation
Inventor： Amit Baxi , Adel Elsherbini , Vincent Mageshkumar , Sasha Oster , Aleksandar Aleksov , Feras Eid
IPC: A61B5/0408 , A61B5/01 , A61B5/026 , A61B5/00 , A61B5/0205
Abstract: Sensing patch systems are disclosed herein. A sensing patch system includes a flexible substrate and a sensor node. The flexible substrate includes one or more substrate sensors configured to provide sensor data, one or more substrate conductors electrically coupled to a corresponding substrate sensor to conduct the sensor data provided by the corresponding substrate sensor, and a node interface. The sensor node includes a substrate interface configured to receive the node interface of the flexible substrate. The sensor node is configured to receive the sensor data provided by the substrate sensors, process the sensor data, and communicate the processed sensor data to a remote device.
-
公开(公告)号：US09865941B1
公开(公告)日：2018-01-09
申请号：US15281814
申请日：2016-09-30
Applicant: Intel Corporation
Inventor： Sasha Oster , Adel A. Elsherbini , Feras Eid , Aleksandar Aleksov , Amit Sudhir Baxi , Johanna M. Swan , Vincent S. Mageshkumar
CPC classification number: H01R4/58 , A44B17/0041 , A44B19/24 , H01R13/03 , H01R43/26
Abstract: A system can include a first portion of a fabric fastener, a second portion of the fabric fastener, wherein the first portion and the second portion are configured to mechanically connect with each other and to resist separation from each other once connected, and wherein the first and second portions include a plurality of corresponding electrical contacts configured to form a plurality of individual electrical connections when the first portion is mechanically connected with the second portion.
-
公开(公告)号：US20170163178A1
公开(公告)日：2017-06-08
申请号：US14961116
申请日：2015-12-07
Applicant: Intel Corporation
Inventor： Nadine L. Dabby , Feras Eid , Adel A. Elsherbini , Braxton Lathrop , Aleksandar Aleksov , Sasha Oster
CPC classification number: F03G5/08 , H01L41/113 , H02N2/18
Abstract: A device for harvesting energy from fabric or clothing includes a piece of fabric or clothing. One or more piezoelectric harvesters are coupled with the piece of fabric or clothing. The piezoelectric harvesters are capable of producing electric energy in response to the movement of the piece of fabric or clothing. Additionally, the device includes one or more energy storage mediums coupled to the one or more piezoelectric harvesters. The energy storage mediums are capable of storing the energy produced by the one or more piezoelectric harvesters. Further, the method for harvesting energy from fabric or clothing involves moving a piece of fabric such that one or more piezoelectric harvesters generate electricity. The method for harvesting energy from fabric or clothing also involves storing the generated electricity in one or more energy storage mediums.
-
-
-
-
-
-
-
-
-
Search Results
31
records
(took 0.02 seconds)
