公开(公告)号：US10380020B2

公开(公告)日：2019-08-13

申请号：US15651543

申请日：2017-07-17

Applicant: International Business Machines Corporation

Inventor： Ekaterina M. Ambroladze ,  Timothy C. Bronson ,  Matthias Klein ,  Pak-kin Mak ,  Vesselina K. Papazova ,  Robert J. Sonnelitter, III ,  Lahiruka S. Winter

IPC: G06F13/16 ,  G06F12/0831

Abstract: Embodiments include methods, systems and computer program products method for maintaining ordered memory access with parallel access data streams associated with a distributed shared memory system. The computer-implemented method includes performing, by a first cache, a key check, the key check being associated with a first ordered data store. A first memory node signals that the first memory node is ready to begin pipelining of a second ordered data store into the first memory node to an input/output (I/O) controller. A second cache returns a key response to the first cache indicating that the pipelining of the second ordered data store can proceed. The first memory node sends a ready signal indicating that the first memory node is ready to continue pipelining of the second ordered data store into the first memory node to the I/O controller, wherein the ready signal is triggered by receipt of the key response.

公开(公告)号：US10374629B1

公开(公告)日：2019-08-06

申请号：US15972394

申请日：2018-05-07

Applicant: International Business Machines Corporation

Inventor： Jonathan D. Bradbury ,  Anthony T. Sofia ,  Matthias Klein

IPC: H03M7/40 ,  H03M7/30

Abstract: A computer system includes a host system that runs an application. The application outputs a compression request to compress a data stream having an initial data-representation size, and which includes a plurality of individual data chunks. A hardware controller compresses the plurality of individual data chunks according to different encodings based on a compression ratio of each of the individual data chunks to generate a compressed data stream having a reduced data-representation size with respect to the initial data-representation size.

公开(公告)号：US10223307B2

公开(公告)日：2019-03-05

申请号：US15623429

申请日：2017-06-15

Applicant: International Business Machines Corporation

Inventor： David F. Craddock ,  Sascha Junghans ,  Matthias Klein ,  Eric N. Lais

IPC: G06F13/28 ,  G06F13/42 ,  G06F12/1027 ,  G06F12/1009 ,  G06F12/1081

Abstract: Embodiments include a technique for management of data transactions, where the technique includes receiving, at a link interface, a packet from an I/O device, wherein the packet includes address information, and performing, by a host bridge, an address translation for the address information included in the packet. The technique also includes responsive to performing the address translation, determining a target page associated with a translated address of the packet is for at least one of a payload target page or a signaling target page, and appending a flag to a command based at least in part on the target page being associated with the translated address of the packet. The technique includes transmitting the command to an ordering controller for ordering the packet.

公开(公告)号：US10223305B2

公开(公告)日：2019-03-05

申请号：US15193905

申请日：2016-06-27

Applicant: International Business Machines Corporation

Inventor： Matthias Klein ,  Eric N. Lais ,  Darwin W. Norton, Jr.

IPC: G06F13/42 ,  G06F15/16 ,  G06F13/28 ,  G06F12/1009 ,  G06F12/0891 ,  G06F13/40

Abstract: A computing system includes a processor and a memory unit that stores program instructions. The system purges an entry from an address translation cache in response to the processor executing the program instructions to perform issuing, via an operating system running on the computing system, a command indicating a request to perform an I/O transaction requiring a translation entry. A host bridge monitors a total data length of the address translation entry to be transferred during the I/O transaction. An address translation entry is selected from an address translation table, loaded into the address translation cache, and data corresponding to the I/O transaction is transferred using the selected address translation entry. The host bridge automatically purges the selected address translation entry from the address translation cache in response to determining the transferred amount of data matches the total data length for the address translation entry.

公开(公告)号：US09965350B2

公开(公告)日：2018-05-08

申请号：US15281690

申请日：2016-09-30

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： David Craddock ,  Matthias Klein ,  Eric N. Lais ,  Harry M. Yudenfriend

IPC: G06F11/10 ,  G06F12/126

CPC classification number: G06F11/1004 ,  G06F12/0875 ,  G06F12/1027 ,  G06F12/1081 ,  G06F12/126 ,  G06F2212/1008 ,  G06F2212/1041 ,  G06F2212/40 ,  G06F2212/69 ,  G06F2212/70

Abstract: A method of maintaining a device table cache (DTC) included in a Synchronous input/output (I/O) computing system includes issuing, with a processor executing an operating system running on the Synchronous I/O computing system, a Synchronous I/O command indicating a request to perform a device table entry transaction including a plurality of device table entries. The method also includes determining, with a host bridge processor, based on device table information, whether the device table entry transaction is associated with a cyclic redundancy check (CRC) transaction, and pinning, with the host bridge processor, a device table entry from a device table based on the determination.

公开(公告)号：US20170097866A1

公开(公告)日：2017-04-06

申请号：US15178788

申请日：2016-06-10

Applicant: International Business Machines Corporation

Inventor： David F. Craddock ,  Beth A. Glendening ,  Matthew J. Kalos ,  Matthias Klein ,  Eric N. Lais ,  Peter G. Sutton ,  Harry M. Yudenfriend

IPC: G06F11/07

CPC classification number: G06F11/0793 ,  G06F11/0745 ,  G06F11/0766 ,  G06F11/08 ,  G06F11/14 ,  G06F13/00

Abstract: Aspects include receiving, at an operating system (OS) executing on a server, a notification that an error was detected during execution of a synchronous I/O operation issued by the OS to a persistent storage control unit (SCU). The notification is received from firmware executing on the server and it includes a command response block that includes error condition information about the error. The method can also include selecting, by the OS, a recovery operation for the synchronous I/O operation. The selecting is based on the error condition information about the error in the command response block. The selected recovery option is performed by the OS.

公开(公告)号：US20170046277A1

公开(公告)日：2017-02-16

申请号：US14929454

申请日：2015-11-02

Applicant: International Business Machines Corporation

Inventor： Matthias Klein ,  Marco Kraemer ,  Carsten Otte ,  Christoph Raisch

IPC: G06F12/12 ,  G06F12/10 ,  G06F12/14

CPC classification number: G06F12/122 ,  G06F9/5077 ,  G06F9/52 ,  G06F12/1009 ,  G06F12/1027 ,  G06F12/123 ,  G06F12/1425 ,  G06F12/1466 ,  G06F12/1483 ,  G06F2212/1024 ,  G06F2212/1052 ,  G06F2212/152 ,  G06F2212/621 ,  G06F2212/657

Abstract: A method for accessing data blocks stored in a computer system. The method may include hardware components for controlling access to a memory unit of the computer system. The memory unit includes a page table and an operating system, where each data block of the data blocks is accessed via a virtual address. The method further includes: adding an entry in the page table for each data block of a first set of the data blocks, the page table represents the virtual address; checking that a first entry of the added entries represents a first virtual address, in response to receiving a request of a first data block via the first virtual address by a memory management unit of the computer system; and obtaining a first physical address of the first data block from the hardware components, and the added entry is provided without indication of the first physical address.

公开(公告)号：US20160217077A1

公开(公告)日：2016-07-28

申请号：US14606432

申请日：2015-01-27

Applicant: International Business Machines Corporation

Inventor： Ekaterina M. Ambroladze ,  Timothy C. Bronson ,  Garrett M. Drapala ,  Michael Fee ,  Matthias Klein ,  Pak-kin Mak ,  Robert J. Sonnelitter, III ,  Gary E. Strait

IPC: G06F12/08

CPC classification number: G06F12/0855 ,  G06F12/0833 ,  G06F2212/1021 ,  G06F2212/608 ,  G06F2212/621

Abstract: Maintaining store order with high throughput in a distributed shared memory system. A request is received for a first ordered data store and a coherency check is initiated. A signal is sent that pipelining of a second ordered data store can be initiated. If a delay condition is encountered during the coherency check for the first ordered data store, rejection of the first ordered data store is signaled. If a delay condition is not encountered during the coherency check for the first ordered data store, a signal is sent indicating a readiness to continue pipelining of the second ordered data store.

Abstract translation: 在分布式共享存储器系统中维护具有高吞吐量的存储顺序。 接收到针对第一有序数据存储的请求，并且启动一致性检查。 发送信号，可以启动第二个有序数据存储的流水线。 如果在第一有序数据存储器的一致性检查期间遇到延迟条件，则发信号通知第一有序数据存储器的拒绝。 如果在第一有序数据存储器的一致性检查期间没有遇到延迟条件，则发送指示准备继续流水线化第二有序数据存储的信号。

公开(公告)号：US09183041B2

公开(公告)日：2015-11-10

申请号：US13624216

申请日：2012-09-21

Applicant: International Business Machines Corporation

Inventor： Norbert Hagspiel ,  Matthias Klein

IPC: G06F12/00 ,  G06F9/46 ,  G06F13/16

CPC classification number: G06F9/467 ,  G06F13/161

Abstract: According to one aspect of the present disclosure a system and technique for input/output traffic backpressure prediction is disclosed. The system includes a processor unit and logic executable by the processor unit to: determine, for each of a plurality of memory transactions, a traffic value corresponding to a time for performing the respective memory transactions; responsive to determining the traffic value for a respective memory transaction, determine a median value based on the determined traffic values; determine whether successive median values are incrementing; and responsive to a quantity of successively incrementing median values exceeding a threshold, indicate a prediction of a backpressure condition.

Abstract translation: 根据本公开的一个方面，公开了一种用于输入/输出业务背压预测的系统和技术。 该系统包括处理器单元和可由处理器单元执行的逻辑，用于：对于多个存储器事务中的每一个，确定对应于用于执行各个存储器事务的时间的业务值; 响应于确定相应存储器事务的业务值，基于所确定的业务量确定中值; 确定连续中值是否递增; 并且响应于超过阈值的连续增加的中值的量，指示背压状态的预测。

公开(公告)号：US20150160962A1

公开(公告)日：2015-06-11

申请号：US14101498

申请日：2013-12-10

Applicant: International Business Machines Corporation

Inventor： Christian Borntraeger ,  Heiko Carstens ,  Dominik Dingel ,  Matthias Klein ,  Einar Lueck

IPC: G06F9/455 ,  H04L29/08 ,  G06F9/54

CPC classification number: G06F9/45558 ,  G06F9/45533 ,  G06F9/4856 ,  G06F9/5077 ,  G06F12/1009 ,  G06F2009/4557 ,  G06F2009/45583 ,  G06F2009/45595 ,  H04L67/1008

Abstract: A process can be scheduled between first and second hosts that using a virtual file system that is shared between the hosts can be used. The process, running on a first hypervisor of the first host, can be scheduled to run on a second hypervisor of the second host. A file can be created that includes the data content of the process address space for the file. The file can be mapped address space of the virtual file system. Data from the physical memory of the first host can be transferred to physical memory of the second host using page fault routines.

Abstract translation: 可以在第一和第二主机之间安排进程，使用可以使用主机之间共享的虚拟文件系统。 运行在第一主机的第一虚拟机管理程序上的进程可被安排在第二主机的第二管理程序上运行。 可以创建一个包含文件的进程地址空间的数据内容的文件。 该文件可以映射虚拟文件系统的地址空间。 来自第一主机的物理存储器的数据可以使用页面故障例程传送到第二主机的物理存储器。