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公开(公告)号:US20210104605A1
公开(公告)日:2021-04-08
申请号:US16595375
申请日:2019-10-07
Applicant: Infineon Technologies AG
Inventor: Michael Hell , Rudolf Elpelt , Caspar Leendertz , Dethard Peters
IPC: H01L29/167 , H01L29/16 , H01L29/66 , H01L29/78
Abstract: A SiC substrate of a semiconductor device includes: a drift region of a first conductivity type; a body region of a second conductivity type having a channel region which adjoins a first surface of the SiC substrate; a source region of the first conductivity type adjoining a first end of the channel region; an extension region of the first conductivity type at an opposite side of the body region as the source region and vertically extending to the drift region; a buried region of the second conductivity type below the body region and having a tail which extends toward the first surface and adjoins the extension region; and a compensation region of the first conductivity type protruding from the extension region into the body region along the first surface and terminating at a second end of the channel region opposite the first end.
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公开(公告)号:US20250151324A1
公开(公告)日:2025-05-08
申请号:US18920187
申请日:2024-10-18
Applicant: Infineon Technologies AG
Inventor: Thomas Aichinger , Dethard Peters , Michael Hell , Andreas Hürner
IPC: H01L29/78 , G01R19/165 , H01L29/16 , H01L29/739 , H03K17/08 , H03K17/082
Abstract: A vertical power semiconductor device includes a silicon carbide (SiC) semiconductor body having opposite first and second surfaces. The SiC semiconductor body includes a transistor cell area including gate structures, a gate pad area, and an interconnection area electrically coupling a gate electrode of the gate structures and a gate pad of the gate pad area via a gate interconnection. The vertical power semiconductor device further includes a sensor electrode and a first interlayer dielectric having a first interface to the sensor electrode and a second interface to at least one of the gate electrode or the gate interconnection. A conduction band offset at the first interface ranges from 1 eV to 2.5 eV. The vertical power semiconductor device further includes a second interface to at least one of the gate electrode or the gate interconnection. The second interlayer dielectric laterally adjoins to the first interlayer dielectric.
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公开(公告)号:US12294018B2
公开(公告)日:2025-05-06
申请号:US18827272
申请日:2024-09-06
Applicant: Infineon Technologies AG
Inventor: Thomas Aichinger , Dethard Peters , Michael Hell , Andreas Hürner
Abstract: A power semiconductor device is proposed. The vertical power semiconductor device includes a silicon carbide (SiC) semiconductor body having a first surface and a second surface opposite to the first surface. The SiC semiconductor body includes a transistor cell area comprising gate structures, a gate pad area, and an interconnection area electrically coupling a gate electrode of the gate structures and a gate pad of the gate pad area via a gate interconnection. The vertical power semiconductor device further includes a source or emitter electrode. The vertical power semiconductor device further includes a first interlayer dielectric comprising a first interface to the source or emitter electrode and a second interface to at least one of the gate electrode, or the gate interconnection, or the gate pad, and wherein a conduction band offset at the first interface ranges from 1 eV to 2.5 eV.
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公开(公告)号:US20250107202A1
公开(公告)日:2025-03-27
申请号:US18882226
申请日:2024-09-11
Applicant: Infineon Technologies AG
Inventor: Thomas Aichinger , Hans Weber , Michael Hell , Wolfgang Bergner , Armin Tilke , Grazvydas Ziemys , Alexey Mikhaylov , Gerald Rescher
IPC: H01L29/40 , H01L29/16 , H01L29/423 , H01L29/51 , H01L29/78
Abstract: A transistor device is disclosed. The transistor device includes a semiconductor body and plurality of transistor cells. Each transistor cell includes: a drift region and a source region of a first doping type; a body region of a second doping type complementary to the first doping type; a field shaping region of the second doping type connected to a source node; and a gate electrode connected to a gate node. The gate electrode is arranged in a trench extending from a first surface into the semiconductor body. The gate electrode is dielectrically insulated from the body region by a gate dielectric. At least portions of the gate electrode are dielectrically insulated from the drift region by a field dielectric. The field shaping region adjoins the trench. The field dielectric comprises a high-k dielectric.
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公开(公告)号:US20250063775A1
公开(公告)日:2025-02-20
申请号:US18794077
申请日:2024-08-05
Applicant: Infineon Technologies AG
Inventor: Michael Hell , Caspar Leendertz , Rudolf Elpelt , Björn Fischer
Abstract: A semiconductor device includes a transistor having a plurality of gate trenches formed in a semiconductor substrate, the gate trenches patterning the semiconductor substrate into ridges. The transistor further includes a gate electrode arranged in at least one of the gate trenches. A source region, a channel region and a part of a current spread region are arranged in the ridges. The semiconductor device further includes a superjunction structure arranged at a larger distance to the source region than the channel region. The superjunction structure includes a first compensation region of the first conductivity type and a second compensation region of the second conductivity type. A doping concentration of the doped portion of the second conductivity type of the channel region decreases in a second horizontal direction intersecting the first horizontal direction from a region close to the gate electrode to a central portion of the ridge.
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公开(公告)号:US20240194778A1
公开(公告)日:2024-06-13
申请号:US18080427
申请日:2022-12-13
Applicant: Infineon Technologies AG
Inventor: Michael Hell , Rudolf Elpelt , Frank Hille , Caspar Leendertz , Armin Willmeroth
IPC: H01L29/78 , H01L21/265 , H01L21/266 , H01L29/06 , H01L29/16
CPC classification number: H01L29/7811 , H01L21/26513 , H01L21/266 , H01L29/0634 , H01L29/0696 , H01L29/1608
Abstract: A semiconductor device includes: a semiconductor substrate having an active device region that includes a plurality of device cells and a termination region between the active device region and an edge of the semiconductor substrate; a field termination structure in the termination region and including a continuous region of a first conductivity type and a plurality of rings of the first conductivity type in the continuous region and having a higher average doping concentration than the continuous region; and a charge balance structure in the active device region and including interleaved columns of the first conductivity type and of a second conductivity type opposite the first conductivity type. The charge balance structure extends into the termination region below the field termination structure such that at least an outermost one of the columns of the first conductivity type is connected to the continuous region of the field termination structure.
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公开(公告)号:US11757031B2
公开(公告)日:2023-09-12
申请号:US16998484
申请日:2020-08-20
Applicant: Infineon Technologies AG
Inventor: Michael Hell , Rudolf Elpelt , Caspar Leendertz
IPC: H01L29/78 , H01L29/872 , H01L29/16 , H01L29/66
CPC classification number: H01L29/7806 , H01L29/1608 , H01L29/66734 , H01L29/872
Abstract: According to an embodiment of a semiconductor device, the device includes: a plurality of device cells formed in a semiconductor substrate, each device cell including a transistor structure and a Schottky diode structure; and a superjunction structure that includes alternating regions of a first conductivity type and of a second conductivity type formed in the semiconductor substrate. For each transistor structure, a channel region of the transistor structure and a Schottky metal region of an adjacent one of the Schottky diode structures are interconnected by semiconductor material of the first conductivity type without interruption by any of the regions of the second conductivity type of the superjunction structure, the semiconductor material of the first conductivity type including one or more of the regions of the first conductivity type of the superjunction structure.
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公开(公告)号:US11626477B2
公开(公告)日:2023-04-11
申请号:US17375034
申请日:2021-07-14
Applicant: Infineon Technologies AG
Inventor: Ralf Siemieniec , Thomas Aichinger , Thomas Basler , Wolfgang Bergner , Rudolf Elpelt , Romain Esteve , Michael Hell , Daniel Kueck , Caspar Leendertz , Dethard Peters , Hans-Joachim Schulze
Abstract: A semiconductor component includes: gate structures extending from a first surface into an SiC semiconductor body; a drift zone of a first conductivity type formed in the SiC semiconductor body; first mesas and second mesas arranged between the gate structures in the SiC semiconductor body; body areas of a second conductivity type arranged in the first mesas and the second mesas, the body areas each adjoining a first side wall of one of the gate structures; first shielding areas of the second conductivity type adjoining a second side wall of one of the gate structures; second shielding areas of the second conductivity type adjoining the body areas in the second mesas; and diode areas of the conductivity type of the drift zone, the diode areas forming Schottky contacts with a load electrode between the first shielding areas and the second shielding areas.
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公开(公告)号:US11552170B2
公开(公告)日:2023-01-10
申请号:US17031358
申请日:2020-09-24
Applicant: Infineon Technologies AG
Inventor: Michael Hell , Rudolf Elpelt , Thomas Ganner , Caspar Leendertz
Abstract: A semiconductor device includes a silicon carbide semiconductor body. A first shielding region of a first conductivity type is connected to a first contact at a first surface of the silicon carbide semiconductor body. A current spread region of a second conductivity type is connected to a second contact at a second surface of the silicon carbide semiconductor body. A doping concentration profile of the current spread region includes peaks along a vertical direction perpendicular to the first surface. A doping concentration of one peak or one peak-group of the peaks is at least 50% higher than a doping concentration of any other peak of the current spread region. A vertical distance between the one peak or the one peak-group of the current spread region and the first surface is larger than a second vertical distance between the first surface and a maximum doping peak of the first shielding region.
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公开(公告)号:US20220199766A1
公开(公告)日:2022-06-23
申请号:US17505716
申请日:2021-10-20
Applicant: Infineon Technologies AG
Inventor: Michael Hell , Rudolf Elpelt , Caspar Leendertz
IPC: H01L29/06 , H01L29/16 , H01L29/78 , H01L29/872 , H01L29/808 , H01L21/04 , H01L21/76 , H01L21/761 , H01L29/66
Abstract: A semiconductor device includes: a SiC substrate; a device structure in or on the SiC substrate and subject to an electric field during operation of the semiconductor device; a current-conduction region of a first conductivity type in the SiC substrate adjoining the device structure; and a shielding region of a second conductivity type laterally adjacent to the current-conduction region and configured to at least partly shield the device structure from the electric field. The shielding region has a higher net doping concentration than the current-conduction region, and has a length (L) measured from a first position which corresponds to a bottom of the device structure to a second position which corresponds to a bottom of the shielding region. The current-conduction region has a width (d) measured between opposing lateral sides of the current-conduction region, and L/d is in a range of 1 to 10.
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