公开(公告)号：US06196042B1

公开(公告)日：2001-03-06

申请号：US09281643

申请日：1999-03-31

Applicant: Thomas H. Distefano ,  Joseph Fjelstad ,  Belgacem Haba

Inventor： Thomas H. Distefano ,  Joseph Fjelstad ,  Belgacem Haba

IPC: B21D2810

CPC classification number: H01L21/4842 ,  Y10T29/49121

Abstract: A tool having a coining projection is operative for forming a frangible portion in a lead of a microelectronic connection component by application of a compressive force. The coining projection is supported on a pedestal formed from a tool body. In an alternative embodiment, the pedestal is formed on a backing plate for use in circuits up construction. The pedestal is sized and shaped so as to be received within a gap formed in a support layer for the leads. By application of the compressive force, the coining projection will penetrate the lead within the region of the gap to form the frangible portion.

Abstract translation: 具有压印突起的工具用于通过施加压缩力来形成微电子连接部件的引线中的易碎部分。 压印突起支撑在由工具主体形成的基座上。 在替代实施例中，基座形成在背板上用于回路结构。 基座的尺寸和形状被设计成容纳在形成在引线的支撑层中的间隙内。 通过施加压缩力，压印突起将在间隙的区域内穿透引线，以形成易碎部分。

公开(公告)号：US6086386A

公开(公告)日：2000-07-11

申请号：US862151

申请日：1997-05-22

Applicant: Joseph Fjelstad ,  Thomas H. DiStefano ,  Konstantine Karavakis ,  Anthony B. Faraci ,  Tan Nguyen

Inventor： Joseph Fjelstad ,  Thomas H. DiStefano ,  Konstantine Karavakis ,  Anthony B. Faraci ,  Tan Nguyen

IPC: H01R11/01 ,  G01R31/28 ,  H01L23/32 ,  H01L23/48 ,  H01L23/498 ,  H01R12/52 ,  H01R33/76 ,  H05K3/32 ,  H05K3/34 ,  H05K3/40 ,  H05K7/10 ,  H01R12/00

CPC classification number: H01L23/32 ,  H01L23/49827 ,  H05K3/326 ,  H05K3/3436 ,  H05K7/1061 ,  H01L2224/13111 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/45144 ,  H01L2224/73251 ,  H01L2224/81191 ,  H01L2224/81385 ,  H01L2224/81901 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01045 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01076 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/14 ,  H01L2924/15173 ,  H01L2924/15311 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/351 ,  H01R12/52 ,  H05K2201/0397 ,  H05K2201/049 ,  H05K2201/10257 ,  H05K2201/10378 ,  H05K2203/041 ,  H05K3/4092 ,  Y02P70/613 ,  Y10T29/49149

Abstract: A connector for microelectronic elements includes a sheetlike body having a plurality of active contacts arranged in a regular grid pattern. The active contacts may include several sheetlike metallic projections extending inwardly around a hole in the sheetlike element, on a first major surface of the sheetlike element. A support structure such as a grid array of noncollapsing structural posts is on a second major surface of the sheetlike element, and each of the posts is electrically connected to one of the active contacts. The grid array of posts and the grid array of active contacts are offset from one another so that an active contact is surrounded by several posts. The posts support the sheetlike element spaced away from a substrate to which the posts are attached. A microelectronic element having bump leads thereon may be engaged by contacting the bump leads with the active contacts, and deflecting the sheetlike element between the bump leads on one side and the posts on the other side. The assembly can be tested, and if found acceptable, the bump leads can be permanently bonded to the contacts.

Abstract translation: 用于微电子元件的连接器包括具有布置成规则网格图案的多个活动触点的片状体。 有源触点可以包括在片状元件的第一主表面上围绕片状元件中的孔向内延伸的几个片状金属突起。 支撑结构例如非隔离结构柱的格子阵列在片状元件的第二主表面上，并且每个柱电连接到一个活动触点。 柱的网格阵列和活动触点的网格阵列彼此偏移，使得活动触点被多个柱包围。 支柱支撑与柱连接的基板间隔开的片状元件。 其上具有凸起引线的微电子元件可以通过使凸起引线与活动触头接触，并使片状元件在一侧的凸起引线与另一侧上的柱之间偏转而接合。 可以测试组件，如果发现可接受，则凸块引线可以永久地粘合到触点上。

公开(公告)号：US5807453A

公开(公告)日：1998-09-15

申请号：US634784

申请日：1996-04-19

Applicant: John W. Smith ,  Joseph Fjelstad

Inventor： John W. Smith ,  Joseph Fjelstad

IPC: H01L23/12 ,  H01L21/60 ,  H01L23/498 ,  H05K3/40 ,  H05K3/32

CPC classification number: H05K3/4092 ,  H01L23/4985 ,  H01L24/80 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  Y10T156/1052 ,  Y10T29/49121 ,  Y10T29/49222

Abstract: A substantially continuous layer of a first metal such as copper is provided with strips of a second metal such as gold by selective electroplating of the second metal, or by applying separately formed strips such as lengths of wire. A dielectric support layer is provided in contact with the first metal layer, and the first metal layer is etched to leave strips of the first metal contiguous with the strips of the second metal, thereby providing composite leads with the first and second metal strips connected in series. The process provides simple and economical methods of making microelectronic connection components with leads having a flexible, fatigue resistant lead portion formed from a precious metal. The leads may incorporate sections of round cross-sectional shape to facilitate engagement by a bonding tool during use of the component.

Abstract translation: 第一金属（例如铜）的基本上连续的层通过第二金属的选择性电镀或通过施加单独形成的条（例如电线长度）来设置有诸如金的第二金属条。 提供与第一金属层接触的电介质支撑层，并且蚀刻第一金属层以留下与第二金属的条带相邻的第一金属的条带，由此提供复合引线，其中第一和第二金属条连接在 系列。 该方法提供了简单和经济的制造微电子连接部件的方法，该引线具有由贵金属形成的柔性耐疲劳引线部分。 引线可以包括圆形横截面形状的部分，以便于在部件使用期间通过焊接工具的接合。

公开(公告)号：US5802699A

公开(公告)日：1998-09-08

申请号：US254991

申请日：1994-06-07

Applicant: Joseph Fjelstad ,  John W. Smith ,  Thomas H. DiStefano ,  A. Christian Walton

Inventor： Joseph Fjelstad ,  John W. Smith ,  Thomas H. DiStefano ,  A. Christian Walton

IPC: G01R1/04 ,  G01R1/067 ,  G01R1/073 ,  G01R31/28 ,  H01L21/48 ,  H01L23/48 ,  H01L23/498 ,  H01R4/02 ,  H01R12/00 ,  H01R12/52 ,  H01R12/57 ,  H01R12/70 ,  H01R12/71 ,  H01R13/24 ,  H05K1/11 ,  H05K3/32 ,  H05K3/34 ,  H05K3/40 ,  H05K7/08 ,  H05K7/10

CPC classification number: H05K7/1084 ,  G01R1/0466 ,  H01L21/4853 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/72 ,  H01R12/52 ,  H01R12/57 ,  H01R12/58 ,  H01R12/7076 ,  H01R12/714 ,  H01R13/2407 ,  H01R13/2485 ,  H05K3/326 ,  H05K3/3436 ,  H05K7/1069 ,  G01R1/06733 ,  H01L2224/16237 ,  H01L2224/8114 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/30107 ,  H01L2924/351 ,  H01R4/028 ,  H05K1/118 ,  H05K2201/0382 ,  H05K2201/0397 ,  H05K2201/1059 ,  H05K2201/10734 ,  H05K3/3431 ,  H05K3/4092 ,  Y02P70/613 ,  Y10T29/49004 ,  Y10T29/4913 ,  Y10T29/49144

Abstract: A connector for microelectronic elements includes a sheet-like body having a plurality of holes, desirably arranged in a regular grid pattern. Each hole is provided with a resilient laminar contact such as a ring of a sheet metal having a plurality of projections extending inwardly over the hole of a first major surface of the body. Terminals on a second surface of the connector body are electrically connected to the contacts. The connector can be attached to a substrate such a multi-layer circuit panel so that the terminals on the connector are electrically connected to the leads within the substrate. Microelectronic elements having bump leads thereon may be engaged with the connector and hence connected to the substrate, by advancing the bump leads into the holes of the connector to engage the bump leads with the contacts. The assembly can be tested, and if found acceptable, the bump leads can be permanently bonded to the contacts.

Abstract translation: 用于微电子元件的连接器包括具有多个孔的片状体，期望地布置成规则的格子图案。 每个孔设置有弹性层状接触，例如金属板的环，其具有在主体的第一主表面的孔的内部向内延伸的多个突起。 连接器主体的第二表面上的端子电连接到触点。 连接器可以附接到诸如多层电路板的基板，使得连接器上的端子电连接到基板内的引线。 具有凸起引线的微电子元件可以与连接器接合并且因此连接到基板，通过将凸块引线推进到连接器的孔中以与触点接合凸起引线。 可以测试组件，如果发现可接受，则凸块引线可以永久地粘合到触点上。

公开(公告)号：USD345182S

公开(公告)日：1994-03-15

申请号：US913548

申请日：1992-07-15

Applicant: Joseph Fjelstad

Designer： Joseph Fjelstad

公开(公告)号：US20100035382A1

公开(公告)日：2010-02-11

申请号：US12587714

申请日：2009-10-13

Applicant: Joseph Fjelstad ,  Konstantine Karavakis

Inventor： Joseph Fjelstad ,  Konstantine Karavakis

IPC: H01L21/78

CPC classification number: H01L21/78 ,  H01L23/3114 ,  H01L23/4951 ,  H01L23/498 ,  H01L24/05 ,  H01L24/13 ,  H01L24/20 ,  H01L2224/02313 ,  H01L2224/02331 ,  H01L2224/0235 ,  H01L2224/0236 ,  H01L2224/02377 ,  H01L2224/024 ,  H01L2224/0401 ,  H01L2224/05548 ,  H01L2224/05572 ,  H01L2224/13008 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/16 ,  H01L2224/45124 ,  H01L2924/0001 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01046 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2224/48 ,  H01L2224/05552

Abstract: A method of making a semiconductor chip package is provided in which a compliant layer is provided over a contact bearing face of a semiconductor chip. The compliant layer can have a bottom surface adjacent to the chip face, a top surface facing away from the bottom surface, and at least one sloping surface between the top and bottom surfaces. The compliant layer can be disposed remote in a lateral direction along the contact bearing face from at least one contact adjacent to the sloping surface. Bond ribbons can be formed atop the compliant layer, wherein each bond ribbon electrically connects one of the contacts to an associated conductive terminal at the top surface of the compliant layer. The compliant layer can provide stress relief to the bond ribbons, such as during handling and affixing the assembly to an external substrate. A bond ribbon can include a strip extending along the sloping surface of the compliant layer, the strip having a substantially constant thickness in a direction extending away from the sloping surface.

Abstract translation: 提供一种制造半导体芯片封装的方法，其中柔性层设置在半导体芯片的接触支承面上方。 柔性层可以具有邻近芯片表面的底表面，背离底表面的顶表面以及顶表面和底表面之间的至少一个倾斜表面。 柔性层可以沿着邻近倾斜表面的至少一个接触件沿接触支承面在横向方向上远处设置。 结合带可以形成在顺应层上方，其中每个结合带将触点中的一个电连接到顺应层的顶表面处的相关联的导电端子。 顺应层可以对结合带提供应力消除，例如在处理和将组件固定到外部基板上时。 粘结带可以包括沿柔性层的倾斜表面延伸的条带，该带在远离倾斜表面的方向上具有基本上恒定的厚度。

公开(公告)号：US20090200655A1

公开(公告)日：2009-08-13

申请号：US12384868

申请日：2009-04-09

Applicant: Joseph Fjelstad

Inventor： Joseph Fjelstad

IPC: H01L23/52

CPC classification number: H01L23/49811 ,  H01L23/49816 ,  H01L24/11 ,  H01L24/13 ,  H01L24/72 ,  H01L2224/11 ,  H01L2224/11003 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01076 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/3025 ,  H01L2924/351 ,  Y10T29/49126 ,  H01L2224/29099 ,  H01L2924/00

Abstract: A microelectronic unit can include a support structure including a dielectric having oppositely-directed first and second surfaces. A plurality of substantially rigid posts can protrude parallel to one another in a direction beyond the first surface of the support structure. Each post may have a top surface remote from the support structure, and the top surfaces can be substantially coplanar with one another. A microelectronic device having a surface with bond pads can overlie the second surface of the support structure with the bond pad-bearing surface of the microelectronic device facing toward the support structure. Connections can electrically connect the posts with the bond pads.

Abstract translation: 微电子单元可以包括支撑结构，其包括具有相反方向的第一和第二表面的电介质。 多个基本上刚性的柱可以在超过支撑结构的第一表面的方向上彼此平行地突出。 每个柱可以具有远离支撑结构的顶表面，并且顶表面可以彼此基本共面。 具有接合焊盘的表面的微电子器件可以覆盖在支撑结构的第二表面上，而微电子器件的接合衬垫承载表面面向支撑结构。 连接可以将接头与接合垫电连接。

公开(公告)号：US20090200654A1

公开(公告)日：2009-08-13

申请号：US12384853

申请日：2009-04-09

Applicant: Joseph Fjelstad

Inventor： Joseph Fjelstad

IPC: H01L23/48

CPC classification number: H01L23/49811 ,  H01L23/49816 ,  H01L24/11 ,  H01L24/13 ,  H01L24/72 ,  H01L2224/11 ,  H01L2224/11003 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01076 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/3025 ,  H01L2924/351 ,  Y10T29/49126 ,  H01L2224/29099 ,  H01L2924/00

Abstract: A microelectronic assembly is provided which can include an element including a first dielectric layer and a second dielectric layer overlying the first dielectric layer, the second dielectric layer having an exposed surface defining an exposed major surface of the element. A plurality of substantially rigid metal posts can project beyond the exposed surface, the metal posts having ends remote from the exposed surface. The microelectronic assembly can include a microelectronic device which has bond pads and overlies the element. The microelectronic device can have a major surface which confronts the posts. Connections electrically connect the ends of the metal posts with the bond pads of the microelectronic device.

Abstract translation: 提供了一种微电子组件，其可以包括包括第一介电层和覆盖在第一介电层上的第二介电层的元件，第二介电层具有限定元件暴露的主表面的暴露表面。 多个基本刚性的金属柱可以突出超过暴露表面，金属柱具有远离暴露表面的端部。 微电子组件可以包括具有接合焊盘并覆盖元件的微电子器件。 微电子器件可以具有面对柱的主表面。 连接电连接金属柱的端部与微电子器件的接合焊盘。

公开(公告)号：US07165316B2

公开(公告)日：2007-01-23

申请号：US10827860

申请日：2004-04-20

Applicant: Joseph Fjelstad

Inventor： Joseph Fjelstad

IPC: H01C17/06

CPC classification number: H01L21/568 ,  H01L21/4832 ,  H01L21/56 ,  H01L21/561 ,  H01L23/3107 ,  H01L23/3121 ,  H01L23/3128 ,  H01L24/48 ,  H01L24/49 ,  H01L24/85 ,  H01L24/97 ,  H01L25/18 ,  H01L2221/68377 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/32245 ,  H01L2224/4809 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48137 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/4847 ,  H01L2224/48472 ,  H01L2224/48475 ,  H01L2224/49171 ,  H01L2224/49433 ,  H01L2224/73265 ,  H01L2224/85001 ,  H01L2224/85051 ,  H01L2224/85444 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01045 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01076 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/181 ,  H01L2924/18165 ,  H01L2924/19043 ,  H01L2924/19107 ,  H01L2924/3011 ,  H01L2224/85 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

Abstract: An electrical resistor is made by providing a sacrificial layer and conductive pads disposed on a first surface of the sacrificial layer. An electrically resistive material is deposited over the pads and on the first surface of the sacrificial layer to form at least one unit including the resistive material and the pads. At least part of the sacrificial layer is then removed so as to expose one or more of the pads.

Abstract translation: 通过提供牺牲层和设置在牺牲层的第一表面上的导电焊盘来制造电阻器。 电阻材料沉积在焊盘之上和牺牲层的第一表面上以形成包括电阻材料和焊盘的至少一个单元。 然后去除牺牲层的至少一部分，以暴露一个或多个焊盘。

公开(公告)号：US20060244150A1

公开(公告)日：2006-11-02

申请号：US11381357

申请日：2006-05-02

Applicant: Joseph Fjelstad

Inventor： Joseph Fjelstad

IPC: H01L23/48

CPC classification number: G11C5/04 ,  B82Y10/00 ,  G01R31/2822 ,  G11C5/063 ,  H01L23/13 ,  H01L23/3114 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/4985 ,  H01L23/5389 ,  H01L23/66 ,  H01L24/48 ,  H01L24/49 ,  H01L2223/6627 ,  H01L2223/6633 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/48465 ,  H01L2224/49109 ,  H01L2224/49433 ,  H01L2224/73215 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15173 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/1903 ,  H01L2924/19039 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01P3/08 ,  H01P5/028 ,  H05K1/024 ,  H05K1/0243 ,  H05K2201/0191 ,  H05K2201/09154 ,  H05K2201/09727 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

Abstract: Disclosed are IC package structures having stair stepped layers and which have no plated vias. Such structures can be fabricated either as discrete packages or as strips such as might be beneficial in for use with memory devices wherein critical or high speed signals can be routed along the length of the multi-chip strip package without having to have the signals ascend and descend from the interconnection substrate on which the assembly is mounted to the IC package termination and back as the signal transmits between devices.