公开(公告)号：US10115651B2

公开(公告)日：2018-10-30

申请号：US15583362

申请日：2017-05-01

Applicant: ROHM CO., LTD.

Inventor： Isamu Nishimura

IPC: H01L23/31 ,  H01L21/56 ,  H01L23/00 ,  H01L25/065 ,  H01L23/13

Abstract: An electronic component includes a substrate that has a first principal surface and a second principal surface, a chip that includes a mounting surface on which a plurality of terminal electrodes are formed and a non-mounting surface positioned on a side opposite to the mounting surface and that is arranged at the first principal surface of the substrate in a posture in which the mounting surface faces the first principal surface of the substrate, and a sealing resin that seals the chip at the first principal surface of the substrate so as to expose the non-mounting surface of the chip.

公开(公告)号：US09937729B2

公开(公告)日：2018-04-10

申请号：US15386884

申请日：2016-12-21

Applicant: ROHM CO., LTD.

Inventor： Isamu Nishimura ,  Yasuhiro Fuwa

IPC: B41J2/335 ,  B41J2/34

CPC classification number: B41J2/33595 ,  B41J2/3351 ,  B41J2/33515 ,  B41J2/33525 ,  B41J2/3353 ,  B41J2/33535 ,  B41J2/3354 ,  B41J2/33545 ,  B41J2/3355 ,  B41J2/3357 ,  B41J2/34

Abstract: A thermal print head includes a semiconductor substrate, a resistor layer and a wiring layer. The resistor layer is formed on the semiconductor substrate and has a plurality of heat generating portions arranged in the main scanning direction. The wiring layer is formed on the semiconductor substrate to be included in a conduction path for energizing the plurality of heat generating portions. The conduction path includes a path or paths provided by the semiconductor substrate itself.

公开(公告)号：US09796189B2

公开(公告)日：2017-10-24

申请号：US15390141

申请日：2016-12-23

Applicant: Rohm Co., Ltd.

Inventor： Isamu Nishimura ,  Yasuhiro Fuwa

IPC: B41J2/335 ,  B41J2/34

CPC classification number: B41J2/33595 ,  B41J2/3351 ,  B41J2/33515 ,  B41J2/33525 ,  B41J2/3353 ,  B41J2/3354 ,  B41J2/33545 ,  B41J2/3355 ,  B41J2/3357 ,  B41J2/34

Abstract: A thermal print head includes a semiconductor substrate, a resistor layer with heat generating portions arranged in the main scanning direction, a wiring layer included in a conduction path for energizing the heat generating portions, and a protective layer covering the resistor layer and the wiring layer. The semiconductor substrate includes a projection protruding from the obverse surface of the substrate and elongated in the main scanning direction. The projection has first and second inclined side surfaces spaced apart from each other in the sub-scanning direction. The heat generating portions are arranged to overlap with the first inclined side surface of the projection as viewed in plan view.

公开(公告)号：US09673144B2

公开(公告)日：2017-06-06

申请号：US14977337

申请日：2015-12-21

Applicant: ROHM CO., LTD.

Inventor： Isamu Nishimura ,  Michihiko Mifuji ,  Kazumasa Nishio

IPC: H01L23/52 ,  H01L23/522 ,  H01L23/528 ,  H01L49/02 ,  H01L23/525 ,  H01L21/768 ,  H01L27/01 ,  H01L23/532

CPC classification number: H01L23/5228 ,  H01L21/76805 ,  H01L21/76829 ,  H01L21/7687 ,  H01L23/522 ,  H01L23/5223 ,  H01L23/5226 ,  H01L23/5258 ,  H01L23/528 ,  H01L23/53223 ,  H01L23/5329 ,  H01L27/016 ,  H01L28/24 ,  H01L28/60 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device has a resistor area and wiring area selectively disposed on a semiconductor substrate. In this semiconductor device, a second interlayer insulating film is formed above the semiconductor substrate, and a thin-film resistor is disposed on the second interlayer insulating film in the resistor area. Vias that contact the thin-film resistor from below are formed in the second interlayer insulating film. A wiring line is disposed on the second interlayer insulating film in the wiring area. A dummy wiring line that covers the thin-film resistor from above is disposed in a third wiring layer that is in the same layer as the wiring line, and an insulating film is interposed between the thin-film resistor and the dummy wiring line.

公开(公告)号：US11817439B2

公开(公告)日：2023-11-14

申请号：US17454897

申请日：2021-11-15

Applicant: ROHM CO., LTD.

Inventor： Isamu Nishimura ,  Mamoru Yamagami

IPC: H01L23/00 ,  H01L25/16 ,  H01L23/31 ,  H01L23/538 ,  H01L21/48 ,  H01L21/56 ,  H01L49/02

CPC classification number: H01L25/16 ,  H01L21/486 ,  H01L21/4853 ,  H01L21/565 ,  H01L23/3121 ,  H01L23/5384 ,  H01L23/5386 ,  H01L23/5389 ,  H01L24/13 ,  H01L24/16 ,  H01L28/10 ,  H01L2224/13083 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/16227 ,  H01L2924/19042 ,  H01L2924/19104

Abstract: A semiconductor device includes a substrate having a main surface, a plurality of first wirings, each having a first embedded part embedded in the substrate and exposed from the main surface, and a mounted part which is in contact with the main surface and is connected to the first embedded part, a semiconductor element having an element rear surface and a plurality of electrodes bonded to the mounted parts, a plurality of second wirings, each having a second embedded part embedded in the substrate and exposed from the main surface and a columnar part protruding from the second embedded part in the thickness direction, and being located outward from the semiconductor element as viewed in the thickness direction; and a passive element located on the side facing the main surface in the thickness direction more than the semiconductor element, and electrically connected to the plurality of second wirings.

公开(公告)号：US11211368B2

公开(公告)日：2021-12-28

申请号：US16695549

申请日：2019-11-26

Applicant: ROHM CO., LTD.

Inventor： Isamu Nishimura ,  Mamoru Yamagami

IPC: H01L25/16 ,  H01L23/00 ,  H01L23/31 ,  H01L23/538 ,  H01L21/48 ,  H01L21/56 ,  H01L49/02

Abstract: A semiconductor device includes a substrate having a main surface, a plurality of first wirings, each having a first embedded part embedded in the substrate and exposed from the main surface, and a mounted part which is in contact with the main surface and is connected to the first embedded part, a semiconductor element having an element rear surface and a plurality of electrodes bonded to the mounted parts, a plurality of second wirings, each having a second embedded part embedded in the substrate and exposed from the main surface and a columnar part protruding from the second embedded part in the thickness direction, and being located outward from the semiconductor element as viewed in the thickness direction; and a passive element located on the side facing the main surface in the thickness direction more than the semiconductor element, and electrically connected to the plurality of second wirings.

公开(公告)号：US11011297B2

公开(公告)日：2021-05-18

申请号：US16803522

申请日：2020-02-27

Applicant: ROHM CO., LTD.

Inventor： Kosei Osada ,  Isamu Nishimura ,  Tetsuya Kagawa ,  Daiki Yanagishima ,  Toshiyuki Ishikawa ,  Michihiko Mifuji ,  Satoshi Kageyama ,  Nobuyuki Kasahara

IPC: H01F27/28 ,  H01L23/64 ,  H01L23/522 ,  H01L23/58 ,  H01L23/495 ,  H01L23/31

Abstract: The semiconductor device of the present invention includes an insulating layer, a high voltage coil and a low voltage coil which are disposed in the insulating layer at an interval in the vertical direction, a low potential portion which is provided in a low voltage region disposed around a high voltage region for the high voltage coil in planar view and is connected with potential lower than the high voltage coil, and an electric field shield portion which is disposed between the high voltage coil and the low voltage region and includes an electrically floated metal member.

公开(公告)号：US10410944B2

公开(公告)日：2019-09-10

申请号：US15970525

申请日：2018-05-03

Applicant: ROHM CO., LTD.

Inventor： Isamu Nishimura

IPC: H01L23/34 ,  H01L23/10 ,  H01L23/28 ,  H01L23/485 ,  H01L23/49 ,  H01L23/31 ,  H01L33/64 ,  H01L33/58 ,  H01L33/62

Abstract: The present disclosure provides a semiconductor device for high efficiently releasing heat generated from a semiconductor element to the outside. The semiconductor device of the present disclosure includes a substrate, made of an intrinsic semiconductor material, having a substrate main surface facing toward a thickness direction z, and configured to have a recess recessed from the substrate main surface; an internal wiring layer, disposed on the substrate main surface and the recess; a columnar conductor, protruding from the internal wiring layer disposed on the substrate main surface toward a direction in which the substrate main surface faces; a semiconductor element, having an element main surface facing the same direction as the substrate main surface, and electrically connected to the internal wiring layer; and a sealing resin, filled into the recess and covering a portion of each of the columnar conductor and the semiconductor element; wherein the semiconductor element has a portion overlapping the recess when viewed in the thickness direction of the substrate, and the semiconductor device is configured to have a heat dissipating layer being in contact with the element main surface and exposed to the outside.

公开(公告)号：US10279597B2

公开(公告)日：2019-05-07

申请号：US15710360

申请日：2017-09-20

Applicant: Rohm Co., Ltd.

Inventor： Isamu Nishimura ,  Yasuhiro Fuwa

IPC: B41J2/335 ,  B41J2/34

Abstract: A thermal print head includes a semiconductor substrate, a resistor layer with heat generating portions arranged in the main scanning direction, a wiring layer included in a conduction path for energizing the heat generating portions, and a protective layer covering the resistor layer and the wiring layer. The semiconductor substrate includes a projection protruding from the obverse surface of the substrate and elongated in the main scanning direction. The projection has first and second inclined side surfaces spaced apart from each other in the sub-scanning direction. The heat generating portions are arranged to overlap with the first inclined side surface of the projection as viewed in plan view.

公开(公告)号：US09983272B2

公开(公告)日：2018-05-29

申请号：US14965312

申请日：2015-12-10

Applicant: ROHM CO., LTD.

Inventor： Isamu Nishimura ,  Yasuhiro Fuwa

IPC: G01R33/06 ,  G01R33/00 ,  G01R33/035

CPC classification number: G01R33/063 ,  G01R33/0052 ,  G01R33/0354

Abstract: Provided is a magnetism detection device by which it is possible to achieve a reduction in size and an increase in accuracy. A magnetism detection device includes: a magneto-impedance element; a magnetic field direction changing body; and a substrate that is formed of a semiconductor material and has an element arrangement recessed portion bottom surface and a back surface that face mutually opposite sides in a thickness direction, and a through-hole that reaches the element arrangement recessed portion bottom surface and the back surface and has a cross-sectional dimension that increases toward the main surface starting from the element arrangement recessed portion bottom surface. The magneto-impedance element is mounted on the element arrangement recessed portion bottom surface, and the magnetic field direction changing body is accommodated in the through-hole.