公开(公告)号：US20240178324A1

公开(公告)日：2024-05-30

申请号：US18518735

申请日：2023-11-24

Applicant: Samsung Electronics Co., Ltd. ,  IUCF-HYU (Industry-University Cooperation Foundation Hanyang University)

Inventor： Kwanghee LEE ,  Jinseong PARK ,  Sangwook KIM ,  Hyemi KIM ,  Seonghwan RYU

IPC: H01L29/786 ,  H01L29/417 ,  H01L29/423 ,  H01L29/66

CPC classification number: H01L29/7869 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/6675 ,  H01L29/78696

Abstract: Provided are a crystalline InZnO oxide semiconductor, a method of forming the same, and a semiconductor device including the crystalline InZnO oxide semiconductor. The crystalline InZnO oxide semiconductor includes an oxide including In and Zn, wherein in Inductively Coupled Plasma-Mass Spectrometry (ICP-MS) analysis, a content of In among In and Zn is about 30 at % or more and about 75 at % or less, and the crystalline InZnO oxide semiconductor has a peak showing crystallinity at a 2-theta value between about 32.3 degrees and about 33.3 degrees in X-ray diffraction (XRD) analysis.

公开(公告)号：US20240021638A1

公开(公告)日：2024-01-18

申请号：US18221736

申请日：2023-07-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yeaju JANG ,  Dongmin KEUM ,  Kwanghee LEE ,  Bumsuk KIM ,  Jinho KIM ,  Yun Ki LEE

IPC: H01L27/146

CPC classification number: H01L27/14623 ,  H01L27/14645

Abstract: An image sensor includes a first pixel group on a substrate and including a plurality of first pixels, a second pixel group on the substrate and including a plurality of second pixels, where at least one of the plurality of first pixels and at least one of the plurality of second pixels are adjacent in a first direction, a first autofocus pixel group between the first pixel group and the second pixel group, the first autofocus pixel group including a first autofocus pixel adjacent to the first pixel group and a second autofocus pixel adjacent to the second pixel group, a first color filter on the first autofocus pixel and the second autofocus pixel, a second color filter on the plurality of second pixels, and a light-shield pattern that separates the first color filter and the second color filter.

公开(公告)号：US20220173255A1

公开(公告)日：2022-06-02

申请号：US17461034

申请日：2021-08-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jinseong HEO ,  Taehwan MOON ,  Hagyoul BAE ,  Seunggeol NAM ,  Sangwook KIM ,  Kwanghee LEE

IPC: H01L29/86 ,  H01L27/115 ,  H01L51/05 ,  H01L27/28

Abstract: A semiconductor apparatus includes a plurality of semiconductor devices. The semiconductor devices each include a ferroelectric layer, a conductive metal oxide layer, and a semiconductor layer, between two electrodes. The conductive metal oxide layer may be between the ferroelectric layer and the semiconductor layer. The ferroelectric layer, the conductive metal oxide layer, and the semiconductor layer may all include a metal oxide. The conductive metal oxide layer may include one or more materials selected from the group consisting of an indium oxide, a zinc oxide, a tin oxide, and any combination thereof.

公开(公告)号：US20220149166A1

公开(公告)日：2022-05-12

申请号：US17399175

申请日：2021-08-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kwanghee LEE ,  Sangwook KIM

IPC: H01L29/423 ,  H01L29/78 ,  H01L29/24 ,  H01L27/088 ,  H01L29/06

Abstract: A field-effect transistor includes a gate structure comprising a structure in which a first insulating layer, a first gate electrode, and a second insulating layer are sequentially stacked on a first conductive layer, the gate structure surrounding a first hole through the first insulating layer and exposing a part of the first conductive layer; a second conductive layer on the second insulating layer and surrounding a second hole connected to the first hole and exposing a part of the first conductive layer; a first gate insulating layer covering an inner wall of the gate structure exposed by the first hole; a semiconductor layer covering a part of the first conductive layer exposed through the first hole and the second hole, the first gate insulating layer, and the second conductive layer; a second gate insulating layer covering the semiconductor layer; and a second gate electrode filling the first and second holes.