公开(公告)号：US20240081062A1

公开(公告)日：2024-03-07

申请号：US18143915

申请日：2023-05-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seungyeon KIM ,  Jiyoung KIM ,  In ho KANG ,  Woosung YANG ,  Jae-Eun LEE

IPC: H10B43/27 ,  H01L23/00 ,  H01L25/065 ,  H01L25/18 ,  H10B41/27 ,  H10B41/41 ,  H10B43/40 ,  H10B80/00

CPC classification number: H10B43/27 ,  H01L24/08 ,  H01L25/0657 ,  H01L25/18 ,  H10B41/27 ,  H10B41/41 ,  H10B43/40 ,  H10B80/00 ,  H01L2224/08145 ,  H01L2924/1431 ,  H01L2924/14511

Abstract: A semiconductor memory includes a substrate that includes pass transistor regions, a peripheral circuit structure that includes pass transistors on the pass transistor regions, and a cell array structure on the peripheral circuit structure, the cell array structure including a plurality of cell array regions and a plurality of connection regions that are alternately arranged along a first direction. The cell array structure includes a stack structure including conductive patterns vertically stacked and correspondingly connected to the pass transistors. The stack structure includes stepwise structures on the connection regions. The connection regions of the cell array structure correspondingly overlap the pass transistor regions of the peripheral circuit structure.

公开(公告)号：US20230099986A1

公开(公告)日：2023-03-30

申请号：US17943551

申请日：2022-09-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Juyun LEE ,  Hanseok KIM ,  Jiyoung KIM ,  Jaehyun PARK ,  Hyeonju LEE ,  Kangjik KIM ,  Sunggeun KIM ,  Seuk SON ,  Hobin SONG ,  Nakwon LEE

IPC: G01R25/04 ,  H03L7/08 ,  H03L7/085

Abstract: An apparatus for generating an output signal having a waveform that is repeated every period, includes a storage configured to store values corresponding to the waveform in a portion of a period of the output signal, a counter configured to generate a first index of a sample included in the output signal, a controller configured to generate at least one control signal based on the first index and the period of the output signal, and a calculation circuit configured to generate the output signal by calculating an output from the storage based on the at least one control signal.

公开(公告)号：US20230094985A1

公开(公告)日：2023-03-30

申请号：US17836199

申请日：2022-06-09

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jiyoung CHU ,  Hyungjin KIM ,  Minhwan SEO ,  Wondon JOO ,  Sungmin AHN ,  Jiyoung KIM ,  Ono KAZUYA ,  Jungchul LEE

IPC: H01L21/68 ,  G01B11/27 ,  H01L23/544 ,  G06T7/00

Abstract: An optical apparatus includes a folding mirror configured to direct first and second illumination lights on first and second alignment marks respectively and reflect first and second reflected lights reflected from the first and second alignment marks in different horizontal directions respectively, first and second lenses arranged respectively in optical paths of the first and second reflected lights reflected from the first and second reflective surfaces of the folding mirror, first and second reflection portions configured to reflect the first and second reflected lights passing through the first and second lenses respectively, and a beam splitter prism configured to divide an illumination light incident through a first surface into the first and second illumination lights and direct to the first and second reflection portions, and transmit the first and second reflected lights reflected by the first and second reflection portions through a second surface.

公开(公告)号：US20230083114A1

公开(公告)日：2023-03-16

申请号：US17828960

申请日：2022-05-31

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yoonjo HWANG ,  Jiyoung KIM

IPC: H01L27/11582 ,  H01L23/522 ,  H01L23/528 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/11565 ,  H01L27/1157

Abstract: A semiconductor device includes a first substrate structure including a substrate, circuit devices, and first bonding metal layers on the circuit devices, and a second substrate structure connected to the first substrate structure on the first substrate structure, wherein the second substrate structure includes a plate layer having a first region and a second region, gate electrodes stacked below the plate layer and extending by different lengths in a second direction in the second region, channel structures penetrating the gate electrodes and each including a channel layer, in the first region, input/output contact structures penetrating the plate layer and the gate electrodes and each including a contact conductive layer, in the second region, and second bonding metal layers connected to the first bonding metal layers, wherein a level of upper surfaces of the input/output contact structures is higher than a level of upper surfaces of the channel structures.

公开(公告)号：US20210225739A1

公开(公告)日：2021-07-22

申请号：US16989017

申请日：2020-08-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Woosung YANG ,  Jiyoung KIM ,  Jiwon KIM

IPC: H01L23/48 ,  H01L27/11582

Abstract: A semiconductor device includes a substrate including a cell region and a connection region. The connection region includes a plurality of pad regions and a through electrode region. A horizontal conductive layer is on the substrate. A supporter is on the horizontal conductive layer. The supporter includes a first portion in the cell region, a second portion in the plurality of pad regions, and a third portion in the through electrode region. A connection conductive layer is between the first portion and the horizontal conductive layer. A connection mold layer is between the third portion and the horizontal conductive layer. A first buried insulation layer passing through the third portion, the connection mold layer, and the horizontal conductive layer is provided. A stacked structure is on the substrate. A through electrode passing through the first buried insulation layer is provided.

公开(公告)号：US20210217765A1

公开(公告)日：2021-07-15

申请号：US17024105

申请日：2020-09-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jiyoung KIM ,  Woosung YANG ,  Sejie TAKAKI

IPC: H01L27/11573 ,  H01L27/11582 ,  H01L27/11565 ,  H01L23/522 ,  H01L27/11519 ,  H01L27/11556 ,  H01L27/11534 ,  G11C7/18

Abstract: A 3D semiconductor memory device includes a peripheral circuit structure on a first substrate, a second substrate on the peripheral circuit structure, an electrode structure on the second substrate, the electrode structure comprising stacked electrodes, and a vertical channel structure penetrating the electrode structure. The peripheral circuit structure includes a dummy interconnection structure under the second substrate. The dummy interconnection structure includes stacked interconnection lines, and a via connecting a top surface of an uppermost one of the interconnection lines to a bottom surface of the second substrate.

公开(公告)号：US20210098478A1

公开(公告)日：2021-04-01

申请号：US16858983

申请日：2020-04-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sung-Min HWANG ,  Woosung YANG ,  Joon-Sung LIM ,  Jiyoung KIM ,  Jiwon KIM

IPC: H01L27/11556 ,  H01L27/11582 ,  G11C5/02 ,  G11C5/06 ,  H01L23/528

Abstract: Disclosed is a three-dimensional semiconductor memory device including a substrate including a cell array region and a connection region, a stack including first and second stacks sequentially stacked on the substrate, the stack having a staircase structure on the connection region, each of the first and second stacks including conductive patterns vertically stacked on the substrate, and contact plugs disposed on the connection region and respectively coupled to the conductive patterns. A bottom surface of each contact plug is located between top and bottom surfaces of a corresponding conductive pattern. In each stack, a recess depth of each contact plug varies monotonically in a stacking direction of the conductive patterns, when measured from a top surface of a corresponding conductive pattern. The contact plugs coupled to an uppermost conductive pattern of the first stack and a lowermost conductive pattern of the second stack have discrete recess depths.

公开(公告)号：US20140268079A1

公开(公告)日：2014-09-18

申请号：US14080977

申请日：2013-11-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jinho KIM ,  Jiyoung KIM ,  Jeong-In YOON ,  Kwangshin LIM

IPC: G03F7/20 ,  G01N15/00

CPC classification number: G03F7/7085 ,  G01N15/00 ,  G01N15/1434 ,  G01N15/1459 ,  G01N2015/0011 ,  G01N2015/0053 ,  G03F7/70341 ,  G03F7/70916

Abstract: A particle counter may include a housing having an inlet, an outlet, and a window therebetween. The inlet and the outlet may be configured such that a fluid can be flowed therethrough. A plurality of light sources may be arranged outside the housing to provide lights of different wavelengths into the housing through the window. Sensors may be provided outside the housing to detect fractions of the lights scattered by a bubble and/or a particle in the fluid. A control part may be configured to monitor intensities of the lights detected by the sensors and to analyze a difference in intensity between the scattered lights, thereby distinguishing the particles from the bubbles in the fluid.

Abstract translation: 颗粒计数器可以包括在其间具有入口，出口和窗口的壳体。 入口和出口可以被配置为使得流体可以流过其中。 多个光源可以布置在壳体外部，以通过窗口将不同波长的光提供到壳体中。 传感器可以设置在壳体外部，以检测由气泡和/或流体中的颗粒散射的光的分数。 控制部件可以被配置为监测由传感器检测到的光的强度并且分析散射光之间的强度差，从而将颗粒与流体中的气泡区分开。

公开(公告)号：US20250118893A1

公开(公告)日：2025-04-10

申请号：US18982370

申请日：2024-12-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Pilwon SEO ,  Seonguk PARK ,  Seokwoo LEE ,  Junhee HAN ,  Jiyoung KIM ,  Jeongseob KIM

IPC: H01Q3/02 ,  G06F1/16 ,  H01Q1/24

Abstract: An electronic is provided. The electronic device includes a first housing, a second housing rotatably connected to the first housing, a display disposed on the front surface of the electronic device and having a partial area configured to be deformed by a rotation of the second housing relative to the first housing, a first antenna module disposed on one of the first housing and the second housing so that a communication signal is radiated in a direction identical to a direction in which the display faces the outside of the electronic device, and a radiation part included in the other or the first housing and the second housing and including an internal space that faces the first antenna module in a state in which the electronic device is folded so that the first housing and the second housing face each other, wherein the first antenna module transmits or receives the communication signal in a designated frequency band through the radiation part.

公开(公告)号：US20240224514A1

公开(公告)日：2024-07-04

申请号：US18498673

申请日：2023-10-31

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junhyoung KIM ,  Jimo GU ,  Jiyoung KIM ,  Sukkang SUNG

IPC: H10B41/27 ,  G11C16/04 ,  H01L25/065 ,  H10B41/10 ,  H10B41/35 ,  H10B43/10 ,  H10B43/27 ,  H10B43/35 ,  H10B80/00

CPC classification number: H10B41/27 ,  G11C16/0483 ,  H01L25/0652 ,  H10B41/10 ,  H10B41/35 ,  H10B43/10 ,  H10B43/27 ,  H10B43/35 ,  H10B80/00 ,  H01L2225/06506

Abstract: An integrated circuit device includes a substrate including a memory cell area and a connection area, a gate stack including a plurality of gate electrodes apart from each other in a vertical direction on the substrate, a plurality of gate connection openings arranged in the connection area to extend inward from an upper surface of the gate stack, one of the plurality of gate electrodes being exposed at a bottom surface of each of the plurality of gate connection openings, a plurality of gate connection structures respectively covering at least inner side surfaces of the plurality of gate connection openings, each of the plurality of gate connection structures being connected with the one gate electrode, and a plurality of gate contacts respectively connected to upper ends of the plurality of gate connection structures.