Display for controlling operation of gamma block on basis of indication of content, and electronic device comprising said display

    公开(公告)号:US11335229B2

    公开(公告)日:2022-05-17

    申请号:US16770784

    申请日:2018-12-17

    Abstract: According to various embodiments of the disclosure, a display may include a display panel including a first region in which first group subpixels are disposed and a second region in which second group subpixels are disposed, a converter group including converters respectively connected to subpixels included in the first group subpixels and the second group subpixels to transfer image data for output of specified content to the subpixels, a first group gamma circuit selectively connected to the converters to output a first grayscale voltage whose intensity is determined based on a plurality of binary bits, a second group gamma circuit selectively connected to the subpixels to output a second grayscale voltage whose intensity is determined based on a single binary bit, and a controller that controls selective connections between the first group gamma circuit and the converters and selective connections between the second group gamma circuit and the subpixels. According to an embodiment, the controller may receive the image data from an external processor and transfer the image data to the converter group, connect the first group gamma circuit with at least some converters such that the first group gamma circuit applies the first grayscale voltage to the at least some converters of the converter group, connect the second group gamma circuit with the second group subpixels such that the second group gamma circuit applies the second grayscale voltage to the second group subpixels, and output the specified content to at least a portion of the first region. In addition, various embodiments understood from the specification are possible.

    Page search method and electronic device supporting the same

    公开(公告)号:US09652140B2

    公开(公告)日:2017-05-16

    申请号:US14167109

    申请日:2014-01-29

    CPC classification number: G06F3/04855 G06F3/0488

    Abstract: The present disclosure relates to a page search function, and provides a page search method and electronic device supporting the same. The page search method for an electronic device includes: identifying information elements contained in a page to be output on a display unit of the electronic device; assigning indexes to the information elements for distinction in consideration of types of the information elements; arranging the indexes on a scroll bar region corresponding to the page; and outputting a composite scroll bar containing the scroll bar region on which the indexes are arranged.

    SEMICONDUCTOR MEMORY DEVICE AND METHOD OF OPERATING THE SAME

    公开(公告)号:US20240331783A1

    公开(公告)日:2024-10-03

    申请号:US18507521

    申请日:2023-11-13

    CPC classification number: G11C16/3459 G11C7/08 G11C16/102 G11C16/26

    Abstract: The present disclosure relates to semiconductor memory devices and methods of operating a semiconductor memory device. One example method includes setting a sensing node of a page buffer to a first voltage, detecting a deviation in operating characteristics of a first sense amplifier and a second sense amplifier with respect to the first voltage, and sequentially repeating a first internal operation for at least two different operating times in the first sense amplifier, the second sense amplifier, or the first sense amplifier and the second sense amplifier based on the deviation in operating characteristics of the first sense amplifier and the second sense amplifier.

    Semiconductor device and massive data storage system including the same

    公开(公告)号:US12057391B2

    公开(公告)日:2024-08-06

    申请号:US17933770

    申请日:2022-09-20

    CPC classification number: H01L23/5226 H10B43/27

    Abstract: A semiconductor device includes a CSL driver on a substrate, a CSP on the CSL driver, a gate electrode structure on the CSP and including gate electrodes spaced apart from each other in a first direction perpendicular to an upper surface of the substrate, each of the gate electrodes extends in a second direction parallel to the upper surface of the substrate, a memory channel structure on the CSP and extending through the gate electrode structure and is connected to the CSP, a first upper wiring structure contacting an upper surface of the CSP, a first through via extending through the CSP in the first direction and is electrically connected to the first upper wiring structure and the CSL driver but does not contact the CPS, and a dummy wiring structure contacting the upper surface of the CSP but is not electrically connected to the CSL driver.

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