MEMORY DEVICE AND OPERATING METHOD THEREOF
    1.
    发明公开

    公开(公告)号:US20240194274A1

    公开(公告)日:2024-06-13

    申请号:US18531872

    申请日:2023-12-07

    CPC classification number: G11C16/3404 G11C16/0433 G11C16/08 G11C16/28

    Abstract: A memory device includes a word line area that is between a bit line and a common source line. The word line area includes a plurality of stacks. A first area includes first stacks with a first resistance value in the word line area, a second area includes second stacks with a second resistance value in the word line area, wherein the second resistance value is different from the first resistance value, a third area includes third stacks with a third resistance value that different from the first resistance value, and a processor is configured to control a recovery sequence of the first area, the second area, and the third area.

    FLASH MEMORY DEVICE HAVING MULTI-STACK STRUCTURE AND CHANNEL SEPARATION METHOD THEREOF

    公开(公告)号:US20230145117A1

    公开(公告)日:2023-05-11

    申请号:US17982081

    申请日:2022-11-07

    CPC classification number: G11C16/102 G11C16/12 G11C16/08

    Abstract: A flash memory device is provided. The flash memory device includes: a first memory cell; a second memory cell on the first memory cell; and a third memory cell between the first memory cell and the second memory cell. The first memory cell, the second memory cell and the third memory cell share a channel. The third memory cell is configured to block channel sharing between the first memory cell and the second memory cell based on a channel separation voltage provided in first to k-th program loops. The third memory cell is configured to connect the channel sharing between the first memory cell and the second memory cell based on a channel connection voltage provided to the third memory cell in a (k+1)-th program loop.

    Method for calculating degree of degradation on basis of properties of image displayed on display and electronic device for implementing same

    公开(公告)号:US11443690B2

    公开(公告)日:2022-09-13

    申请号:US17266013

    申请日:2019-06-04

    Abstract: Disclosed is an electronic device comprising at least one sensor, a communication circuit, a display, and at least one processor operationally connected to the display, wherein the at least one processor is configured to: display, on the display, a watch screen including a fixed element displayed at a designated location on the display, a repetitive element displayed on the basis of at least a designated rule, and a changing element associated with information obtained through the at least one sensor or received through the communication circuit; generate first data on the basis of at least one of the designated rule or the shape of the repetitive element; generate second data based on at least one of the fixed element or the changing element, in response to the changing element changing from a first value to a second value; and generate first deterioration information on the basis of the first data, the second data, and the duration over which the changing element maintains the first value. Various other embodiments understood through the specification are also possible.

    Memory device
    6.
    发明授权

    公开(公告)号:US11437105B2

    公开(公告)日:2022-09-06

    申请号:US17234955

    申请日:2021-04-20

    Abstract: A memory device includes memory blocks, each including memory cells, and peripheral circuits that control the memory blocks and execute an erase operation for each of the memory blocks. Each memory block includes word lines stacked on a substrate, channel structures extending perpendicular to an upper surface of the substrate and penetrating through the word lines, and a source region disposed on the substrate and connected to the channel structures. During an erase operation in which an erase voltage is input to the source region of a target memory block, the peripheral circuits reduce a voltage of a first word line from a first bias voltage to a second bias voltage at a first time and reduce a voltage of a second word line, different from the first word line, from a third bias voltage to a fourth bias voltage at a second time different from the first in time.

    Method and apparatus for controlling lock or unlock in portable terminal
    8.
    发明授权
    Method and apparatus for controlling lock or unlock in portable terminal 有权
    用于在便携式终端中控制锁定或解锁的方法和装置

    公开(公告)号:US09395833B2

    公开(公告)日:2016-07-19

    申请号:US14338964

    申请日:2014-07-23

    CPC classification number: G06F3/041 G06F3/04883

    Abstract: A method and an apparatus for controlling to lock or unlock in the portable terminal having a transparent display that has two display surfaces and is capable of double-sided touch input and double-sided display is provided. The method includes activating the transparent display according to a lock state or an unlock state of the transparent display; displaying a lock or unlock area, which notifies whether a display surface is locked, in a preset area of at least one of display surfaces of the transparent display; and changing the lock state or the unlock state of the at least one of the display surfaces of the transparent display and displaying whether the changed state is the lock state or the unlock state in the lock or unlock area of the at least one display surface, when a touch input is received in the lock or unlock area.

    Abstract translation: 提供一种用于控制在具有两个显示表面并具有双面触摸输入和双面显示的透明显示器的便携式终端中进行锁定或解锁的方法和装置。 该方法包括根据透明显示器的锁定状态或解锁状态激活透明显示器; 在所述透明显示器的至少一个显示表面的预设区域中显示用于通知显示表面是否被锁定的锁定或解锁区域; 并且改变透明显示器的至少一个显示表面的锁定状态或解锁状态,并且显示改变的状态是否是至少一个显示表面的锁定或解锁区域中的锁定状态或解锁状态, 当在锁或解锁区域中接收到触摸输入时。

    Non-volatile memory device and programming method thereof

    公开(公告)号:US12217807B2

    公开(公告)日:2025-02-04

    申请号:US17960346

    申请日:2022-10-05

    Abstract: An operating method of a non-volatile memory device that includes a plurality of cell strings each including a first stack and a second stack adjacent to the first stack, the operating method include performing a first program operation during a time period in which a plurality of program loops are performed, by applying a program voltage including a first plurality of voltage levels to a select word line connected to the first stack of each of the plurality of cell strings, applying, during the time period, second voltages including a second plurality of voltage levels to a non-select word line connected to the first stack of each of the plurality of cell strings, and maintaining, during the time period, a third voltage at a first level, the third voltage applied to a non-select word line connected to the second stack of each of the plurality of cell strings.

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