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公开(公告)号:US09530868B2
公开(公告)日:2016-12-27
申请号:US14506682
申请日:2014-10-05
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Nan-Yuan Huang , An-Chi Liu
IPC: H01L21/762 , H01L21/311 , H01L29/66 , H01L29/06 , H01L29/78 , H01L21/3065 , H01L21/308
CPC classification number: H01L29/66795 , H01L21/3065 , H01L21/3086 , H01L21/31138 , H01L29/0653 , H01L29/0657 , H01L29/6681 , H01L29/785
Abstract: A fin structure and a method of forming the same, where the fin structure includes a fin and a protrusion having irregular shape. The fin and the protrusion are both formed on a substrate, and the protrusion has a height less than that of the fin. With such arrangement, the fin structure of the present invention, as well as the method of forming the same, can achieve the purpose of keeping the fin from collapsing and over etching.
Abstract translation: 翅片结构及其形成方法,其中翅片结构包括翅片和具有不规则形状的突起。 翅片和突起都形成在基底上,突起的高度小于翅片的高度。 通过这样的结构,本发明的翅片结构及其形成方法可以达到保持翅片不会塌陷和过蚀刻的目的。
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公开(公告)号:US20160336451A1
公开(公告)日:2016-11-17
申请号:US14741464
申请日:2015-06-17
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Jhen-Cyuan Li , Nan-Yuan Huang , Shui-Yen Lu
CPC classification number: H01L29/7853 , H01L29/0653 , H01L29/165 , H01L29/66795 , H01L29/7851
Abstract: A non-planar transistor is provided. It includes a substrate, a fin structure, a gate structure, a spacer structure and a source/drain region. The fin structure is disposed on the substrate, the gate structure is disposed on the fin structure. The spacer structure is disposed on a sidewall of the gate structure. The spacer structure includes a first spacer with a first height and a second spacer with a second height, wherein the first spacer is disposed between the second spacer, and the first height is different from the second height. The source/drain region is disposed in a semiconductor layer at two sides of the spacer structure. The present invention further provides a method of forming the same.
Abstract translation: 提供非平面晶体管。 它包括衬底,翅片结构,栅极结构,间隔结构和源极/漏极区域。 翅片结构设置在基板上,栅极结构设置在翅片结构上。 间隔结构设置在栅极结构的侧壁上。 间隔结构包括具有第一高度的第一间隔件和具有第二高度的第二间隔件,其中第一间隔件设置在第二间隔件之间,第一高度不同于第二高度。 源极/漏极区域设置在间隔结构的两侧的半导体层中。 本发明还提供一种形成该方法的方法。
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