Distributed hardware tracing
    21.
    发明授权

    公开(公告)号:US11650895B2

    公开(公告)日:2023-05-16

    申请号:US17240838

    申请日:2021-04-26

    Applicant: Google LLC

    Abstract: A computer-implemented method executed by one or more processors, the method includes monitoring execution of program code executed by a first processor component; and monitoring execution of program code executed by a second processor component. A computing system stores data identifying hardware events in a memory buffer. The stored events occur across processor units that include at least the first and second processor components. The hardware events each include an event time stamp and metadata characterizing the event. The system generates a data structure identifying the hardware events. The data structure arranges the events in a time ordered sequence and associates events with at least the first or second processor components. The system stores the data structure in a memory bank of a host device and uses the data structure to analyze performance of the program code executed by the first or second processor components.

    SELF RE-ENCODING INTERPRETED APPLICATION
    22.
    发明申请

    公开(公告)号:US20190138284A1

    公开(公告)日:2019-05-09

    申请号:US15803055

    申请日:2017-11-03

    Abstract: A method for self re-encoding an interpreted application includes parsing a string of characters in a comment section of the interpreted application file. Responsive to determining that at least one character of the string of characters is not readable by the target platform, the processor re-encodes the interpreted application file using the string of characters in the comment section. The re-encoding includes parsing a first character in the string of characters. The processor then, optionally, outputs a warning message indicative that a non-native encoding exists in the interpreted application file. The processor parses a second character sequential to the first character. The second character is a first element in a second string of characters indicative of a re-encoding scheme for re-encoding the interpreted application. The processor then outputs a re-encoded application file that is executable by the processor of the target platform.

    FIELD CONTENT BASED PATTERN GENERATION FOR HETEROGENEOUS LOGS

    公开(公告)号:US20180307576A1

    公开(公告)日:2018-10-25

    申请号:US15956381

    申请日:2018-04-18

    Abstract: A system and method are provided for pattern discovery in input heterogeneous logs having unstructured text content and one or more fields. The system includes a memory. The system further includes a processor in communication with the memory. The processor runs program code to preprocess the input heterogeneous logs to obtain pre-processed logs by splitting the input heterogeneous logs into tokens. The processor runs program code to generate seed patterns from the preprocessed logs. The processor runs program code to generate final patterns by specializing a selected set of fields in each of the seed patterns to generate a final pattern set.

    SYNCHRONOUS HARDWARE EVENT COLLECTION
    26.
    发明申请

    公开(公告)号:US20180285233A1

    公开(公告)日:2018-10-04

    申请号:US15472932

    申请日:2017-03-29

    Applicant: Google Inc.

    Abstract: A computer-implemented method that includes monitoring execution of program code by first and second processor components. A computing system detects that a trigger condition is satisfied by: i) identifying an operand in a portion of the program code; or ii) determining that a current time of a clock of the computing system indicates a predefined time value. The operand and the predefined time value are used to initiate trace events. When the trigger condition is satisfied the system initiates trace events that generate trace data identifying respective hardware events occurring across the computing system. The system uses the trace data to generate a correlated set of trace data. The correlated trace data indicates a time ordered sequence of the respective hardware events. The system uses the correlated set of trace data to analyze performance of the executing program code.

    Method, information processing apparatus, and medium

    公开(公告)号:US10001992B2

    公开(公告)日:2018-06-19

    申请号:US15042561

    申请日:2016-02-12

    Inventor: Masao Yamamoto

    Abstract: A method includes: calculating a percentage of an instruction belonging to a certain instruction type among instruction types included in each of a plurality of blocks partitioned from a program; extracting an execution address and a number of execution instructions from an arithmetic processing unit that executes the program and performs sampling of the execution address and the number of execution instructions at a plurality of time points, calculating a first execution frequency of the instruction included in each of the plurality of blocks based on the extracted execution address and the number of execution instructions; calculating a second execution frequency of the instruction belonging to the instruction type by multiplying the first execution frequency of the block by the percentage of the instruction in the block; calculating total number of second execution frequencies calculated for each of the plurality of blocks.

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