Chip carrier with accumulator
    32.
    发明授权
    Chip carrier with accumulator 失效
    芯片载体带蓄电池

    公开(公告)号:US5019892A

    公开(公告)日:1991-05-28

    申请号:US158014

    申请日:1988-02-18

    Abstract: A chip carrier (2) for use with an integrated circuit chip (4) has an accumulator means (38) provided in an enclosed gel filled chip receiving opening (14). The accumulator means (38) and the gel (34) cooperate to fill the opening (14), such that as the gel (34) expands, the accumulator means (38) is forced to contract. This cooperation insures that the forces applied to the chip carrier (2) due to the expansion of the gel (34) will not be great enough to cause the failure of the chip carrier (2). In the alternative, as the gel (34) contracts, the accumulator means (38) expands, insuring that a constant pressure is applied to the gel (34), thereby preventing the unrestrained motion of the gel (34) in the chip receiving opening (14). Consequently, the accumulator means (38) and the gel (34) cooperate to insure that the chip carrier (2) and the chip (4) therein will be reliable in any type of environment.

    Abstract translation: 与集成电路芯片(4)一起使用的芯片载体(2)具有设置在封闭的凝胶填充芯片接收开口(14)中的蓄电装置(38)。 蓄能器装置(38)和凝胶(34)配合以填充开口(14),使得当凝胶(34)膨胀时,蓄能器装置(38)被迫收缩。 这种合作确保由于凝胶(34)的膨胀而施加到芯片载体(2)的力将不足以引起芯片载体(2)的故障。 或者,当凝胶(34)收缩时,蓄能器装置(38)膨胀,确保对凝胶(34)施加恒定的压力,从而防止凝胶(34)在芯片接收开口中的无限制运动 (14)。 因此,蓄电池装置(38)和凝胶(34)协调以确保其中的芯片载体(2)和芯片(4)在任何类型的环境中是可靠的。

    Socketing a semiconductor device
    34.
    发明授权
    Socketing a semiconductor device 失效
    插座半导体器件

    公开(公告)号:US4880386A

    公开(公告)日:1989-11-14

    申请号:US273398

    申请日:1988-11-18

    CPC classification number: H05K7/1061 H01L2924/0002

    Abstract: A film mounted semiconductor device is applied to a socket therefor by means of a protective carrier from which project four posts arranged in such a way that a line drawn between two opposite posts would pass through the center of the carrier. The film is formed with elongate slots each receiving one of the posts with clearance in the longitudinal direction of the slot but the post closely fitting the slot in its transverse direction. Each post is fitted snugly into a pocket in the socket. The slots allow relative movement between the film and the posts to take up dimensional changes resulting from temperature and humidity changes, but as the posts fit the slots in their transverse direction, the film, the carrier and the socket are maintained concentric.

    Semiconductor chip carrier system
    35.
    发明授权
    Semiconductor chip carrier system 失效
    半导体芯片载体系统

    公开(公告)号:US4873615A

    公开(公告)日:1989-10-10

    申请号:US100151

    申请日:1987-09-23

    Abstract: An integrated circuit semiconductor chip carrier system (10) which provides reliable interconnection of one or more semiconductor chips (13) to external circuitry in environments of variable temperature and stress. The system (10) includes a housing (11), one or more semiconductor chips (13) mounted on a substrate (12), and a plurality of electrical terminals (36) which extend through one or more walls (21, 22, 23, 24) of the housing (11). Each terminal (36) having an inner resilient portion (36b) which is adapted to be electrically connected to a contact pad (32) which is in electrical engagement with a semiconductor chip (13) on the substrate (12). The inner resilient portions (36b) being directly connected to the pads (32) in such a manner so that as the substrate (12) expands and contracts according to temperature variations, the inner resilient portions (36b) move accordingly, thereby eliminating harmful stresses which results in "bi-metal effect". A non-conductive, flexible, electrical interconnection member (76) is also provided for electrically connecting the semiconductor chips (13) of the substrate (12) to a plurality of terminals (36). The interconnection member (76) is attached to the substrate (12) in only a very few locations enabling the interconnection member (76) to be restrained in lateral movement while permitting the contact pads (78) of the interconnection member (76) to flex and deform freely relative to the substrate (12) and the semiconductor chips (13) as a result of temperature variations.

    Abstract translation: 一种集成电路半导体芯片载体系统(10),其在可变温度和应力的环境中提供一个或多个半导体芯片(13)与外部电路的可靠互连。 系统(10)包括壳体(11),安装在基板(12)上的一个或多个半导体芯片(13)和延伸穿过一个或多个壁(21,22,23)的多个电端子 ,24)。 每个端子(36)具有内部弹性部分(36b),其适于电连接到与衬底(12)上的半导体芯片(13)电接合的接触焊盘(32)。 内部弹性部分(36b)以这样的方式直接连接到焊盘(32),使得当基板(12)根据温度变化而膨胀和收缩时,内部弹性部分(36b)相应地移动,从而消除有害应力 这导致“双金属效应”。 还提供非导电柔性电互连构件(76),用于将衬底(12)的半导体芯片(13)电连接到多个端子(36)。 互连构件(76)仅在非常少的位置附接到基板(12),使得互连构件(76)能够被限制在横向移动中,同时允许互连构件(76)的接触垫(78)弯曲 并且由于温度变化而相对于衬底(12)和半导体芯片(13)自由变形。

    Manufacturing method for integrated circuit chip carriers
    36.
    发明授权
    Manufacturing method for integrated circuit chip carriers 失效
    集成电路芯片载体的制造方法

    公开(公告)号:US4810616A

    公开(公告)日:1989-03-07

    申请号:US83611

    申请日:1987-08-07

    CPC classification number: H05K13/021 Y10S269/903

    Abstract: Manufacturing method for integrated circuit chip carrier or similar devices comprises the steps of producing the substrate as a discrete part by pressing ceramic powder in a precision mold and sintering the pressed part. The discrete substrates are then placed in a work holder in which a plurality of substrates are precisely located with both surfaces of each substrate exposed. The manufacturing steps of metallizing the substrates, imaging, plating, resist removal, etching, and so on, can then be carried out on all of the substrates in the work holder simultaneously. The processes can be applied to both surfaces of each substrate simultaneously and in addition, further steps such as assembly of an IC chip to each substrate and wire bonding can be carried out while the substrates are in the work holder. The process greatly reduces the cost of manufacturing chip carriers, particularly the type having terminal pads on both surfaces of the substrate and conductors extending between the major surfaces.

    Abstract translation: 用于集成电路芯片载体或类似装置的制造方法包括以下步骤:通过将精密模具中的陶瓷粉末压制并烧结被压制部件来制造作为分立部件的基板。 然后将分立的基板放置在工件保持器中,其中多个基板精确定位,每个基板的两个表面都被暴露。 然后可以在工件保持器中的所有基板上同时进行金属化基板,成像,电镀,抗蚀剂去除,蚀刻等的制造步骤。 该工艺可以同时应用于每个衬底的两个表面,此外,可以在衬底处于工件保持器中的同时进行诸如将IC芯片组装到每个衬底和引线接合之类的其它步骤。 该方法大大降低了制造芯片载体的成本,特别是具有在基板的两个表面上的端子焊盘和在主表面之间延伸的导体的类型。

    Scrap removal system for stamping and forming machine and sensor
apparatus for detecting movement between conveyor belts
    37.
    发明授权
    Scrap removal system for stamping and forming machine and sensor apparatus for detecting movement between conveyor belts 失效
    用于冲压和成型机的废料去除系统和用于检测输送带之间运动的传感器装置

    公开(公告)号:US4809576A

    公开(公告)日:1989-03-07

    申请号:US89191

    申请日:1987-08-25

    Abstract: A scrap removal system is disclosed for a stamping and forming machine in which strip material is fed in a vertical plane through a tooling assembly having punches and dies therein so that holes are punched in the strip when the punches move through the strip and into the die openings. Such punching operations produce small bits of scrap material commonly referred to as slugs. The die block is mounted against a supporting structure which has passageways extending therethrough in alignment with the die openings so that as the slugs are produced, they are pushed into the passageways and form stacks of aligned slugs. The passageways extend to outlets, past which a slug removing device in the form of an endless belt continuously moves. As the slugs are pushed from the slug outlets, the endless belt carries them laterally and disposes of them at a location beside the tooling assembly. A detecting means is also disclosed which stops the machine in the event of failure of the scrap removal system.

    Abstract translation: 公开了一种用于冲压和成型机的废料去除系统,其中条带材料在垂直平面中通过具有冲头和模具的模具组件进给,使得当冲头移动穿过带材并进入模具时在孔中冲孔 开口 这种冲压操作产生通常称为s lug的少量废料。 模块安装在支撑结构上,该支撑结构具有与模具开口对准的通道延伸,使得当块塞产生时,它们被推入通道并形成排列的排列的堆垛。 通道延伸到出口,通过这些出口连续移动环形带形式的排渣装置。 当塞子从塞子出口被推出时,环形带将它们横向地携带并将它们放置在工具组件旁边的位置。 还公开了一种在废料去除系统发生故障的情况下停止机器的检测装置。

    Chip carrier and carrier socket for closely spaced contacts
    38.
    发明授权
    Chip carrier and carrier socket for closely spaced contacts 失效
    芯片载体和载体插座,用于紧密间隔的触点

    公开(公告)号:US4684184A

    公开(公告)日:1987-08-04

    申请号:US818831

    申请日:1986-01-14

    CPC classification number: H05K7/1069

    Abstract: Chip carrier comprising a square chip carrier body as slots extending inwardly from its side surfaces midway between its corners. These slots function as keyways for keys that are contained in the chip carrier socket. The keys are located midway between the corners of the chip carrier receiving recess and each key is in the row of contact terminals which are positioned in the socket body in surrounding relationship to the recess. By virtue of this system of positioning the chip carrier in the chip carrier socket, the effects of differential thermal expansion of the chip carrier relative to the chip carrier socket are minimized.

    Abstract translation: 芯片载体包括方形芯片载体主体,作为从其位于其角部之间的侧表面向内延伸的槽。 这些插槽用作芯片载体插座中包含的键的键槽。 键位于芯片承载座接收凹部的角部之间的中间,并且每个键位于与凹部相关的关系中位于插座主体中的接触端子列中。 由于这种将芯片载体定位在芯片载体插座中的系统,芯片载体相对于芯片载体插座的差分热膨胀的影响被最小化。

    Surface mountable coefficient of expansion matching connector
    39.
    发明授权
    Surface mountable coefficient of expansion matching connector 失效
    表面贴装膨胀系数匹配连接器

    公开(公告)号:US4550959A

    公开(公告)日:1985-11-05

    申请号:US673222

    申请日:1984-11-20

    Abstract: A modular connector housing of relatively short length and having a coupling feature, such as a tab at one end and a recess at the other end, is connected with other similar connector housings. A filler material having a melting point lower than that of the particular soldering method chosen is then inserted into that portion where two housings are joined thereby forming a relatively rigid long connector housing. A hot-melt adhesive preform is then placed on the bottom of the connector housing with the entire connector housing assembly aligned with and attached to a printed circuit board. The hot-melt adhesive bonds the connector housing to the substrate while the filler material melts away from the filler openings, allowing the short incremental housing lengths to move relatively free with respect to each other.

    Abstract translation: 具有较短长度并且具有耦合特征的模块化连接器壳体,例如一端的突出部和另一端的凹部,与其它类似的连接器壳体连接。 然后将熔点低于所选择的特定焊接方法的填充材料插入到两个壳体接合的部分中,从而形成相对刚性的长连接器壳体。 然后将热熔粘合剂预成型件放置在连接器壳体的底部上,整个连接器壳体组件与印刷电路板对准并连接到印刷电路板。 加热熔融粘合剂将连接器壳体粘合到基底上,同时填充材料从填充物开口熔化,允许短的增量壳体长度相对于彼此相对自由地移动。

    Connection of leadless integrated circuit package to a circuit board
    40.
    发明授权
    Connection of leadless integrated circuit package to a circuit board 失效
    将无引线集成电路封装连接到电路板

    公开(公告)号:US4513353A

    公开(公告)日:1985-04-23

    申请号:US453074

    申请日:1982-12-27

    CPC classification number: H05K7/1069

    Abstract: A device for connecting leadless integrated circuit packages to a chip carrier housing or socket and then to a printed circuit board is taught. Briefly stated, a mask is selectively disposed on a printed circuit board. Locating ribs are correspondently disposed on a chip carrier housing so as to cooperatively engage the slots created by the absence of the mask on the printed circuit board. Additionally, barriers for separating contacts contained in the chip carrier housing are maintained at the interior and the exterior portion of the chip carrier housing walls with no material disposed therebetween thereby minimizing capacitive as well as inductive effects which may come about. Additionally, four discrete interlocking brackets are disposed on top of the chip carrier housing which allow for complete assembly of the chip carrier to the printed circuit board before mating of an integrated circuit chip with the retaining brackets then interlocked so as to relatively rigidly maintain a chip carrier in electrical contact with the contacts. The present device therefore allows for relatively fast accurate alignment of all attendant contact surfaces.

    Abstract translation: 教导了一种将无引线集成电路封装连接到芯片载体壳体或插座,然后连接到印刷电路板的装置。 简而言之,掩模被选择性地布置在印刷电路板上。 定位肋相应地设置在芯片载体壳体上,以便协调地接合由印刷电路板上不存在掩模而产生的槽。 此外,包含在芯片载体壳体中的分离触点的屏障保持在芯片载体壳体壁的内部和外部部分,没有材料设置在其间,从而最小化电容性以及可能产生的电感效应。 另外,四个独立的互锁支架设置在芯片载体壳体的顶部,这允许在将集成电路芯片与保持支架配合之前将芯片载体完全组装到印刷电路板上,从而相互刚性地保持芯片 载体与触点电接触。 因此,本装置允许所有伴随的接触表面的相对快速的精确对准。

Patent Agency Ranking