Abstract:
Provided is a programming method that increases writing performance of a flash memory device. The programming method for a flash memory device that includes a plurality of banks including a plurality of memory cells for storing multi-bit data includes the following: programming a most significant bit (MSB) page with respect to banks of a first bank group; programming a least significant bit (LSB) page with respect to banks of a second bank group; programming the MSB page with respect to the banks of the second bank group; and programming the LSB page with respect to the banks of the first bank group.
Abstract:
A method and apparatus to transmit personal information, the method including: receiving an information request message requesting the personal information; receiving the personal information from a user; receiving a transmission approval from the user; transmitting a service requesting identifier to the service provider when the transmission approval is received; receiving a security policy with respect to the personal information to be transmitted; securing the personal information to be transmitted according to the received security policy; and transmitting the personal information to the service provider. Therefore, the personal information can be safely transmitted.
Abstract:
The present invention relates to an optical transmittance device including an optical fiber having a tilted incident plane and a silicon optical bench (SiOB) with a mirror plane. In accordance with the present invention, there provided an optical device, including: a substrate having a groove with a tilted surface, wherein the groove has a mirror plane on the tilted surface; a light emitting means aligned to the substrate; and an optical fiber including a tilted incident plane, wherein a reflected light from the mirror plane is incident to the tilted incident plane.
Abstract:
A user interface using an acoustic signal is provided. A device with the user interface includes a sensor to acquire a surface acoustic signal generated outside of the device, and at least one processor. The processor classifies patterns of the surface acoustic signal by analyzing features of the surface acoustic signal, and identifies a user's input signal corresponding to the surface acoustic signal based on the pattern of the surface acoustic signal.
Abstract:
A method and apparatus for improving application processing speed in a digital device which improve application processing speed for a digital device running in an embedded environment where processor performance may not be sufficiently powerful by detecting an execution request for an application, identifying a group to which the requested application belongs, among preset groups with different priorities and scheduling the requested application according to the priority assigned to the identified group, and executing the requested application based on the scheduling result.
Abstract:
A method of controlling a non-volatile memory device includes comparing the number of banks that are in operating states with a threshold value. If the number of the banks is smaller than the threshold value, data stored in a standby bank is read. If there is no bank having data to be read, a standby bank is programmed. If the number of the banks is equal to or greater than the threshold value or if the reading or the programming is performed, it is determined whether there is a reading or programming command to be performed. If there is the reading or programming command to be performed, the process is repeated from the comparing step. The programming may include programming of a most significant bit (MSB) page or a least significant bit (LSB) page.
Abstract:
A method and apparatus for improving application processing speed in a digital device which improve application processing speed for a digital device running in an embedded environment where processor performance may not be sufficiently powerful by detecting an execution request for an application, identifying a group to which the requested application belongs, among preset groups with different priorities and scheduling the requested application according to the priority assigned to the identified group, and executing the requested application based on the scheduling result.
Abstract:
The present disclosure provides a controller which comprises a command generator configured to generate a command to non volatile memory, and buffer configured to receive a first data and a second data and configured to combine the first data and the second data, an ECC unit configured to perform the ECC decoding. And the first page data may include at least one error bit corresponding to an error location table and the second page data may include at least one original bit which can be replaced with the error bit. The buffer may replace the at least one error bit with the said at least one original bit. The error location table may save information of location for the repeated error bit.
Abstract:
An apparatus for generating a probabilistic graphical model based on a time-space structure. The apparatus includes a first matrix generation unit configured to generate a first matrix having variables corresponding to stream data; a second matrix generation unit configured to classify the variables of the first matrix into either object variables that are objects of interest or input variables, acquire combination variables from multi-order combination of the input variables, and generate a second matrix using the acquired combination variables; and a model creation unit configured to create the probabilistic graphical model using the object variables of the first matrix and the combination variables of the second matrix.
Abstract:
Disclosed herein is a printed circuit board facilitating expansion of number of memory modules and memory system including the same. The printed circuit board of the present invention includes a plurality of slots and a plurality of controller terminals. Each of slots disposed in locations ranging from a 2n−1+1th location to a 2nth location with respect to the controller terminals includes 2k−n module terminals connected to the module terminals of slots ranging from the slot disposed in the first location to a slot disposed in a 2n−1th location; wherein, in the printed circuit board and memory system including the printed circuit board according to the present invention, dummy modules are not required to expand the number of memory modules. Further, according to the printed circuit board of the present invention, the expansion of the number of memory modules is facilitated.