公开(公告)号：US08324692B2

公开(公告)日：2012-12-04

申请号：US12953426

申请日：2010-11-23

Applicant: Zhen Chen ,  Yung Feng Lin ,  Lin Huang

Inventor： Zhen Chen ,  Yung Feng Lin ,  Lin Huang

IPC: H01L27/11

CPC classification number: H01L27/13 ,  H01F17/0006 ,  H01F2017/0046 ,  H01F2017/0073 ,  H01F2017/0086 ,  H01L23/5222 ,  H01L23/5227 ,  H01L23/53295 ,  H01L27/08 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method of fabricating an integrated inductor device includes providing a silicon substrate and forming a thickness of an insulating layer overlying the silicon substrate. The insulating layer includes a dummy structure within a portion of the thickness. The method includes forming an inductor having a first portion and a second portion. The first portion includes a spiral coil of conductor lines. The method also includes exposing the dummy structure by forming an opening in the insulating layer and removing the dummy structure to form a cavity underlying the inductor to reduce a dielectric constant and to increase a Q value of the inductor. The method includes using aluminum or copper for the dummy structures. The method includes dry etching the insulator and wet etching the dummy structure. The method also includes forming the inductors using aluminum or copper.

Abstract translation: 制造集成电感器件的方法包括提供硅衬底并形成覆盖硅衬底的绝缘层的厚度。 绝缘层在厚度的一部分内包括虚拟结构。 该方法包括形成具有第一部分和第二部分的电感器。 第一部分包括导线的螺旋线圈。 该方法还包括通过在绝缘层中形成开口并去除虚拟结构以形成电感器下面的空腔来暴露虚拟结构，以降低介电常数并增加电感器的Q值。 该方法包括使用铝或铜作为虚拟结构。 该方法包括干法蚀刻绝缘体并湿式蚀刻虚拟结构。 该方法还包括使用铝或铜形成电感器。

公开(公告)号：US20120287150A1

公开(公告)日：2012-11-15

申请号：US13450730

申请日：2012-04-19

Applicant: KAI-LIN HUANG

Inventor： KAI-LIN HUANG

IPC: G09G5/00

CPC classification number: G09G5/00 ,  G06F3/04817 ,  G06F3/04892

Abstract: A display screen of a hand-held electronic device displays a plurality of icons corresponding to application programs of the hand-held electronic device. The hand-held electronic device includes an up/down-arrow key and a left/right-arrow key. If the up/down-arrow key has been operated, the hand-held electronic device focuses an icon according to an operation direction of the up/down-arrow key and a frequency of use relating to each icon. If the left/right-arrow key has been operated, the hand-held electronic device focuses an icon according to an operation direction of the left/right-arrow key and a use time of each icon.

Abstract translation: 手持电子装置的显示画面显示与手持电子装置的应用程序对应的多个图标。 手持电子装置包括上/下箭头键和左/右箭头键。 如果已经操作了上/下箭头键，则手持电子设备根据上/下箭头键的操作方向和与每个图标相关的使用频率来对照图标。 如果操作了左/右箭头键，则手持电子设备根据左/右箭头键的操作方向和每个图标的使用时间对图标进行聚焦。

公开(公告)号：US20120255401A1

公开(公告)日：2012-10-11

申请号：US13083834

申请日：2011-04-11

Applicant: Wei-Fang Wang ,  Jian-Lin Huang ,  Chun-Kai Huang ,  Chun-Chia Huang

Inventor： Wei-Fang Wang ,  Jian-Lin Huang ,  Chun-Kai Huang ,  Chun-Chia Huang

IPC: B25B7/02 ,  B21K5/00

CPC classification number: B25B7/04 ,  B25B7/18

Abstract: A pair of pliers has a body and two jaws. The body has two connecting sections and two handles. The jaws are detachably mounted on the connecting sections of the body, and each jaw has a working nose and a mounting section. The mounting section has a mounting hole formed in a bottom surface of the mounting section and corresponding to the connecting section of the body in the shape and having a circular hole with a depth D and a diameter R, an enlarged hole with a depth smaller than the depth D and an inner diameter larger than the diameter R at the circular hole and cutting chips deposited and accumulated in the circular hole and shaped as a hill with a convex top.

Abstract translation: 一把钳子有一个身体和两个钳口。 身体有两个连接部分和两个手柄。 夹爪可拆卸地安装在主体的连接部分上，并且每个夹爪具有工作鼻部和安装部分。 安装部具有安装孔，该安装孔形成在安装部的底面上，对应于本体的连接部，形状为具有深度D和直径R的圆形孔，深度小于 深度D和大于圆形孔处的直径R的内径，并且沉积并积聚在圆形孔中的切屑，并且形成为具有凸起顶部的山丘。

公开(公告)号：US08286246B2

公开(公告)日：2012-10-09

申请号：US11837053

申请日：2007-08-10

Applicant: Xu Zhou ,  Lin Huang ,  Michael Xie

Inventor： Xu Zhou ,  Lin Huang ,  Michael Xie

IPC: G06F11/00 ,  G06F11/30

CPC classification number: G06F21/568 ,  G06F12/1009 ,  G06F21/562 ,  G06F21/564 ,  G06F21/565 ,  G06F21/567 ,  G06F2212/1052 ,  G06F2212/152 ,  G06F2212/657

Abstract: Various embodiments of the present invention provide circuits and methods for improved virus processing. As one example, such methods may include providing a system memory, a general purpose processor and a virus co-processor. The methods further include receiving a data segment at the general purpose processor, and storing the data segment to the system memory using virtual addresses. The data segment is accessed from the system memory by the virus co-processor using the virtual addresses. The virus co-processor then scans the data segment for viruses and returns a result.

Abstract translation: 本发明的各种实施例提供了用于改进病毒处理的电路和方法。 作为一个示例，这样的方法可以包括提供系统存储器，通用处理器和病毒协处理器。 所述方法还包括在通用处理器处接收数据段，并使用虚拟地址将数据段存储到系统存储器。 使用虚拟地址由病毒协处理器从系统存储器访问数据段。 病毒协处理器然后扫描数据段的病毒并返回结果。

公开(公告)号：US08264086B2

公开(公告)日：2012-09-11

申请号：US11294217

申请日：2005-12-05

Applicant: Shau-Lin Shue ,  Cheng-Lin Huang ,  Ching-Hua Hsieh

Inventor： Shau-Lin Shue ,  Cheng-Lin Huang ,  Ching-Hua Hsieh

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC classification number: H01L23/5226 ,  H01L21/76804 ,  H01L21/76805 ,  H01L21/76807 ,  H01L21/76843 ,  H01L21/76844 ,  H01L21/76846 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A via structure having improved reliability and performance and methods of forming the same are provided. The via structure includes a first-layer conductive line, a second-layer conductive line, and a via electrically coupled between the first-layer conductive line and the second-layer conductive line. The via has a substantially tapered profile and substantially extends into a recess in the first-layer conductive line.

Abstract translation: 提供了具有改进的可靠性和性能的通孔结构及其形成方法。 通孔结构包括第一层导电线，第二层导电线和电耦合在第一层导电线和第二层导电线之间的通路。 通孔具有基本上锥形的轮廓并且基本上延伸到第一层导电线中的凹部中。

公开(公告)号：US20120214103A1

公开(公告)日：2012-08-23

申请号：US13030533

申请日：2011-02-18

Applicant: Ming Kang Wei ,  Pei Lin Huang ,  Yi Ming Wang ,  Ying Chung Tseng

Inventor： Ming Kang Wei ,  Pei Lin Huang ,  Yi Ming Wang ,  Ying Chung Tseng

IPC: G03F7/20

CPC classification number: H01L21/31144 ,  G03F7/094 ,  G03F7/095 ,  H01L21/0274

Abstract: A method for fabricating semiconductor devices with fine patterns includes the steps of providing a semiconductor substrate, forming a first photoresist layer on the semiconductor substrate, forming a second photoresist layer on the first photoresist layer, and performing an exposing process to change the state of at least one first portion of the first photoresist layer and the state of at least one second portion of the second photoresist layer. The conventional double patterning technique requires that the exposure processes be performed twice, which requires very precise alignment between the two exposure processes. In contrast, the embodiment of the present invention can perform the double patterning process with only one exposure process without requiring the precise alignment between the two exposure processes.

Abstract translation: 用于制造具有精细图案的半导体器件的方法包括以下步骤：提供半导体衬底，在半导体衬底上形成第一光致抗蚀剂层，在第一光致抗蚀剂层上形成第二光致抗蚀剂层，以及执行曝光过程以改变 第一光致抗蚀剂层的至少一个第一部分和第二光致抗蚀剂层的至少一个第二部分的状态。 传统的双重图案化技术要求曝光过程进行两次，这需要两次曝光过程之间非常精确的对准。 相反，本发明的实施例可以仅用一次曝光工艺进行双重图案化处理，而不需要两次曝光过程之间的精确对准。

公开(公告)号：US08245025B2

公开(公告)日：2012-08-14

申请号：US12555418

申请日：2009-09-08

Applicant: Pai-Lin Huang ,  Rong-Jian Kuang ,  Ming-Chung Hsieh

Inventor： Pai-Lin Huang ,  Rong-Jian Kuang ,  Ming-Chung Hsieh

IPC: G06F15/177

CPC classification number: G06F9/4401

Abstract: The present invention is a computer motherboard with a Basic Input Output System (BIOS) capable of built-in configuration display, characterized in that the BIOS includes a first means and a second means. The first and second means are code internally provided in the BIOS and executable by a CPU of the computer motherboard in an execution environment preset by the BIOS. The first means enables acquisition of CPU configuration data stored on the CPU and configuration data for displaying the CPU. The second means enables acquisition of memory module configuration data stored on at least a memory module and configuration data for displaying the memory module. After the computer motherboard enters a BIOS setup utility, a user selects an option of execution of the first or second means to execute CPU and memory configuration display without using an operating system.

Abstract translation: 本发明是具有能够内置配置显示的基本输入输出系统（BIOS）的计算机主板，其特征在于，所述BIOS包括第一装置和第二装置。 第一和第二装置是在BIOS中内部提供的代码，并且由BIOS预先设置的执行环境中由计算机主板的CPU执行。 第一种方法是采集存储在CPU上的CPU配置数据和用于显示CPU的配置数据。 第二种装置使得能够获取存储在至少存储器模块中的存储器模块配置数据和用于显示存储器模块的配置数据。 在计算机主板进入BIOS设置实用程序之后，用户选择执行第一或第二装置的选项来执行CPU和存储器配置显示而不使用操作系统。

公开(公告)号：US20120194575A1

公开(公告)日：2012-08-02

申请号：US13442882

申请日：2012-04-10

Applicant: Chih-Jen Yen ,  Yueh-Hsiu Liu ,  Ju-Lin Huang ,  Peng-Yu Chen ,  Yu-Shao Liu

Inventor： Chih-Jen Yen ,  Yueh-Hsiu Liu ,  Ju-Lin Huang ,  Peng-Yu Chen ,  Yu-Shao Liu

IPC: G09G5/10

CPC classification number: G09G3/3696 ,  G09G3/3614 ,  G09G3/3688 ,  G09G2310/027 ,  G09G2310/0297 ,  G09G2320/0673

Abstract: A gamma-voltage generator is provided to generating a plurality of first gamma voltages and second gamma voltages. At least one of the first gamma voltages generated by DACs of the gamma-voltage generator within a first frame period and at least one of the second gamma voltages generated by the DACs within a second frame period are outputted from a same one of the gamma buffers of the gamma-voltage generator, whereby the transmitted gamma voltages have substantially equal offset. Therefore, the display quality approaches an ideal condition.

Abstract translation: 提供伽马电压发生器以产生多个第一伽马电压和第二伽马电压。 在第一帧周期内由伽马电压发生器的DAC产生的第一伽马电压中的至少一个和由第二帧周期内的DAC产生的第二伽马电压中的至少一个从相同的一个伽马缓冲器输出 的γ电压发生器，由此所传输的伽马电压具有基本相等的偏移。 因此，显示质量接近理想状态。

公开(公告)号：US20120194469A1

公开(公告)日：2012-08-02

申请号：US13323854

申请日：2011-12-13

Applicant: Hsin-Hao WANG ,  Yen-Lin HUANG

Inventor： Hsin-Hao WANG ,  Yen-Lin HUANG

IPC: G06F3/044

CPC classification number: G06F3/044 ,  G06F3/0416

Abstract: In a demodulation system for a low-power differential-sensing capacitive touch panel, the capacitive touch panel has n first conductor lines in a first direction and m second conductor lines in a second direction, and a mutual capacitance is generated at each intersection of the n first conductor lines and the m second conductor lines. The demodulation system has a signal generator, a detection circuit, a programmable gain amplifier, an analog to digital converter. During a driving cycle, the signal generator generates a pair of differential driving signals to drive two of the first conductor lines in the first direction for eliminating common noises of the two first conductor lines and avoiding the common noises from being amplified by the programmable gain amplifier.

Abstract translation: 在低功率差分感测电容式触摸面板的解调系统中，电容式触摸面板在第一方向上具有n个第一导体线，在第二方向上具有m个第二导体线，并且在 n个第一导体线和m个第二导体线。 解调系统具有信号发生器，检测电路，可编程增益放大器，模数转换器。 在驱动周期期间，信号发生器产生一对差分驱动信号，以沿第一方向驱动两条第一导体线，以消除两条第一导线的共同噪声，并避免共同的噪声被可编程增益放大器放大 。

公开(公告)号：US08174481B2

公开(公告)日：2012-05-08

申请号：US12690087

申请日：2010-01-19

Applicant: Ju-Lin Huang

Inventor： Ju-Lin Huang

IPC: G09G3/36

CPC classification number: G09G3/3688 ,  G09G3/3614 ,  G09G2310/027 ,  G09G2310/0297 ,  G09G2320/0673

Abstract: A driving circuit of a liquid crystal display including a first input port, a second input port, a first gamma buffer, a second gamma buffer, and a switching circuit is provided. A plurality of first gamma voltages are inputted from the first input port, and a plurality of second gamma voltages are inputted from the second input port. The switching circuit switches the connections between the two input ports and the two gamma buffers, such that a first line of pixels of the liquid crystal display receives the gamma voltages from the first gamma buffer within a first frame period and a second frame period, and that a second line of pixels of the liquid crystal display receives the gamma voltages from the second gamma buffer within the first frame period and the second frame period.

Abstract translation: 提供了包括第一输入端口，第二输入端口，第一伽马缓冲器，第二伽马缓冲器和开关电路的液晶显示器的驱动电路。 从第一输入端口输入多个第一伽马电压，并且从第二输入端口输入多个第二伽玛电压。 开关电路切换两个输入端口和两个伽马缓冲器之间的连接，使得液晶显示器的第一行像素在第一帧周期和第二帧周期内从第一伽马缓冲器接收伽马电压，以及 液晶显示器的第二行像素在第一帧周期和第二帧周期内从第二伽马缓冲器接收伽马电压。