公开(公告)号：US20200013611A1

公开(公告)日：2020-01-09

申请号：US16574542

申请日：2019-09-18

Applicant: ASM IP HOLDING B.V.

Inventor： Antti J. Niskanen ,  Shang Chen ,  Viljami Pore

IPC: H01L21/02 ,  C23C16/34 ,  C23C16/455 ,  H01L29/66

Abstract: Methods and precursors for depositing silicon nitride films by atomic layer deposition (ALD) are provided. In some embodiments the silicon precursors comprise an iodine ligand. The silicon nitride films may have a relatively uniform etch rate for both vertical and the horizontal portions when deposited onto three-dimensional structures such as FinFETS or other types of multiple gate FETs. In some embodiments, various silicon nitride films of the present disclosure have an etch rate of less than half the thermal oxide removal rate with diluted HF (0.5%).

公开(公告)号：US10480064B2

公开(公告)日：2019-11-19

申请号：US16040844

申请日：2018-07-20

Applicant: ASM IP Holding B.V.

Inventor： Delphine Longrie ,  Antti Juhani Niskanen ,  Han Wang ,  Qi Xie ,  Jan Willem Maes ,  Shang Chen ,  Toshiharu Watarai ,  Takahiro Onuma ,  Dai Ishikawa ,  Kunitoshi Namba

IPC: C23C16/02 ,  C23C16/455 ,  H01L21/285 ,  H01L21/768 ,  C23C16/06 ,  C23C16/34 ,  C23C16/44 ,  C23C16/56

Abstract: Metallic layers can be selectively deposited on one surface of a substrate relative to a second surface of the substrate. In some embodiments, the metallic layers are selectively deposited on a first metallic surface relative to a second surface comprising silicon. In some embodiments the reaction chamber in which the selective deposition occurs may optionally be passivated prior to carrying out the selective deposition process. In some embodiments selectivity of above about 50% or even about 90% is achieved.

公开(公告)号：US10424477B2

公开(公告)日：2019-09-24

申请号：US15703241

申请日：2017-09-13

Applicant: ASM IP HOLDING B.V.

Inventor： Antti J. Niskanen ,  Shang Chen ,  Viljami Pore

IPC: H01L21/02 ,  C23C16/34 ,  C23C16/455 ,  H01L29/66

Abstract: Methods and precursors for depositing silicon nitride films by atomic layer deposition (ALD) are provided. In some embodiments the silicon precursors comprise an iodine ligand. The silicon nitride films may have a relatively uniform etch rate for both vertical and the horizontal portions when deposited onto three-dimensional structures such as FinFETS or other types of multiple gate FETs. In some embodiments, various silicon nitride films of the present disclosure have an etch rate of less than half the thermal oxide removal rate with diluted HF (0.5%).

公开(公告)号：US10395917B2

公开(公告)日：2019-08-27

申请号：US15902300

申请日：2018-02-22

Applicant: ASM IP HOLDING B.V.

Inventor： Antti J. Niskanen ,  Shang Chen ,  Viljami Pore ,  Atsuki Fukazawa ,  Hideaki Fukuda ,  Suvi P. Haukka

IPC: H01L21/02 ,  H01L21/311 ,  H01L21/8234

Abstract: Methods and precursors for depositing silicon nitride films by atomic layer deposition (ALD) are provided. In some embodiments the silicon precursors comprise an iodine ligand. The silicon nitride films may have a relatively uniform etch rate for both vertical and the horizontal portions when deposited onto three-dimensional structures such as FinFETS or other types of multiple gate FETs. In some embodiments, various silicon nitride films of the present disclosure have an etch rate of less than half the thermal oxide removal rate with diluted HF (0.5%).

公开(公告)号：US20190055643A1

公开(公告)日：2019-02-21

申请号：US16040844

申请日：2018-07-20

Applicant: ASM IP Holding B.V.

Inventor： Delphine Longrie ,  Antti Juhani Niskanen ,  Han Wang ,  Qi Xie ,  Jan Willem Maes ,  Shang Chen ,  Toshiharu Watarai ,  Takahiro Onuma ,  Dai Ishikawa ,  Kunitoshi Namba

IPC: C23C16/02 ,  C23C16/44 ,  C23C16/06 ,  H01L21/768 ,  C23C16/455 ,  H01L21/285 ,  C23C16/56 ,  C23C16/34

Abstract: Metallic layers can be selectively deposited on one surface of a substrate relative to a second surface of the substrate. In some embodiments, the metallic layers are selectively deposited on a first metallic surface relative to a second surface comprising silicon. In some embodiments the reaction chamber in which the selective deposition occurs may optionally be passivated prior to carrying out the selective deposition process. In some embodiments selectivity of above about 50% or even about 90% is achieved.

公开(公告)号：US20180080121A1

公开(公告)日：2018-03-22

申请号：US15795768

申请日：2017-10-27

Applicant: ASM IP Holding B.V.

Inventor： Delphine Longrie ,  Antti Juhani Niskanen ,  Han Wang ,  Qi Xie ,  Jan Willem Maes ,  Shang Chen ,  Toshiharu Watarai ,  Takahiro Onuma ,  Dai Ishikawa ,  Kunitoshi Namba

IPC: C23C16/02 ,  C23C16/455 ,  H01L21/768 ,  H01L21/285

CPC classification number: C23C16/02 ,  C23C16/06 ,  C23C16/345 ,  C23C16/4404 ,  C23C16/4405 ,  C23C16/45525 ,  C23C16/45536 ,  C23C16/56 ,  H01L21/28562 ,  H01L21/7685

Abstract: Metallic layers can be selectively deposited on one surface of a substrate relative to a second surface of the substrate. In some embodiments, the metallic layers are selectively deposited on a first metallic surface relative to a second surface comprising silicon. In some embodiments the reaction chamber in which the selective deposition occurs may optionally be passivated prior to carrying out the selective deposition process. In some embodiments selectivity of above about 50% or even about 90% is achieved.

公开(公告)号：US09803277B1

公开(公告)日：2017-10-31

申请号：US15177195

申请日：2016-06-08

Applicant: ASM IP Holding B.V.

Inventor： Delphine Longrie ,  Antti Juhani Niskanen ,  Han Wang ,  Qi Xie ,  Jan Willem Maes ,  Shang Chen ,  Toshiharu Watarai ,  Takahiro Onuma ,  Dai Ishikawa ,  Kunitoshi Namba

IPC: C23C16/02 ,  H01L21/768 ,  H01L21/285 ,  C23C16/455

CPC classification number: C23C16/02 ,  C23C16/06 ,  C23C16/345 ,  C23C16/4404 ,  C23C16/4405 ,  C23C16/45525 ,  C23C16/45536 ,  C23C16/56 ,  H01L21/28562 ,  H01L21/7685

Abstract: Metallic layers can be selectively deposited on one surface of a substrate relative to a second surface of the substrate. In some embodiments, the metallic layers are selectively deposited on a first metallic surface relative to a second surface comprising silicon. In some embodiments the reaction chamber in which the selective deposition occurs may optionally be passivated prior to carrying out the selective deposition process. In some embodiments selectivity of above about 50% or even about 90% is achieved.

公开(公告)号：US20140273531A1

公开(公告)日：2014-09-18

申请号：US14062328

申请日：2013-10-24

Applicant: ASM IP HOLDING B.V.

Inventor： Antti J. Niskanen ,  Shang Chen ,  Viljami Pore ,  Atsuki Fukazawa ,  Hideaki Fukuda

IPC: H01L21/02

CPC classification number: H01L21/0217 ,  C23C16/045 ,  C23C16/345 ,  C23C16/45542 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/0228 ,  H01L29/66795

Abstract: Methods and precursors for depositing silicon nitride films by atomic layer deposition (ALD) are provided. In some embodiments the silicon precursors comprise an iodine ligand. The silicon nitride films may have a relatively uniform etch rate for both vertical and the horizontal portions when deposited onto three-dimensional structures such as FinFETS or other types of multiple gate FETs. In some embodiments, various silicon nitride films of the present disclosure have an etch rate of less than half the thermal oxide removal rate with diluted HF (0.5%).