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公开(公告)号：US20200350822A1
公开(公告)日：2020-11-05
申请号：US16877260
申请日：2020-05-18
Applicant: Apple Inc.
Inventor： Sanjay Pant , Fabio Gozzini , Hubert Attah , Jonathan F. Bolus , Wenxun Huang
IPC: H02M3/158 , H02M3/157 , G06F1/3203 , H03M1/12
Abstract: A voltage regulator circuit included in a computer system may include multiple phase circuits each coupled to a regulated power supply node via a corresponding inductor. The phase circuits may modify a voltage level of the regulated power supply node using respective control signals generated by a digital control circuit that processes multiple data bits. An analog-to-digital converter circuit may compare the voltage level of the regulated power supply node to multiple reference voltage levels and sample the resultant comparisons to generate the multiple data bits.
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公开(公告)号：US20200274538A1
公开(公告)日：2020-08-27
申请号：US16803861
申请日：2020-02-27
Applicant: Apple Inc.
Inventor： Jared L. Zerbe , Brian S. Leibowitz , Sanjay Pant
Abstract: Techniques are disclosed relating to detecting supply voltage events and performing corrective actions. In some embodiments, an apparatus includes sensor circuitry and control circuitry. In some embodiments, the sensor circuitry is configured to monitor supply voltage from a power supply and detect a load release event that includes an increase in the supply voltage that meets one or more pre-determined threshold parameters. In some embodiments, the control circuitry is configured to increase clock cycle time for operations performed by circuitry powered by the supply voltage during a time interval, wherein the time interval corresponds to ringing of the supply voltage that reduces the supply voltage and results from the load release event. In some embodiments, the disclosed techniques may reduce transients in supply voltage (which may avoid equipment damage and computing errors) and may allow for reduced voltage margins (which may reduce overall power consumption).
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公开(公告)号：US10581440B2
公开(公告)日：2020-03-03
申请号：US15419218
申请日：2017-01-30
Applicant: Apple Inc.
Inventor： Jared L. Zerbe , Brian S. Leibowitz , Sanjay Pant
Abstract: Techniques are disclosed relating to detecting supply voltage events and performing corrective actions. In some embodiments, an apparatus includes sensor circuitry and control circuitry. In some embodiments, the sensor circuitry is configured to monitor supply voltage from a power supply and detect a load release event that includes an increase in the supply voltage that meets one or more pre-determined threshold parameters. In some embodiments, the control circuitry is configured to increase clock cycle time for operations performed by circuitry powered by the supply voltage during a time interval, wherein the time interval corresponds to ringing of the supply voltage that reduces the supply voltage and results from the load release event. In some embodiments, the disclosed techniques may reduce transients in supply voltage (which may avoid equipment damage and computing errors) and may allow for reduced voltage margins (which may reduce overall power consumption).
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公开(公告)号：US10230379B2
公开(公告)日：2019-03-12
申请号：US15146374
申请日：2016-05-04
Applicant: Apple Inc.
Inventor： Brian S. Leibowitz , Jared L. Zerbe , Sanjay Pant
Abstract: Techniques are disclosed relating to rapidly downshifting the output frequency of an oscillator. In some embodiments, the oscillator is configured to operate in a closed-loop mode in which negative feedback is used to maintain a particular output frequency (e.g., in a phase-locked loop (PLL)). In some embodiments, the negative feedback loop is configured to maintain the output of the oscillator at a particular frequency based on a reference clock signal and the output of the oscillator. The nature of a negative feedback loop may render rapid frequency changes difficult, e.g., because of corrections by the loop. Therefore, in some embodiments, the loop is configured to switch to an open-loop mode in which a control input to the oscillator is fixed. In some embodiments, the loop switches to open-loop mode in response to a trigger signal and control circuitry forces the oscillator to a new target frequency.
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公开(公告)号：US20240069621A1
公开(公告)日：2024-02-29
申请号：US17823949
申请日：2022-08-31
Applicant: Apple Inc.
Inventor： Shawn Searles , Sanjay Pant , Ludmil N. Nikolov , Tiago Filipe Galhoz Patrao , Enrico Zanetti , Hao Zhou , Vincenzo Bisogno
IPC: G06F1/3296 , H02M1/00 , H02M3/157
CPC classification number: G06F1/3296 , H02M1/0006 , H02M1/0025 , H02M1/007 , H02M3/157
Abstract: A power delivery system included in a computer system using multiple power converter circuits to generate respective voltage levels on multiple power supply nodes. The power delivery system includes a step-down power converter circuit that generates a voltage level for use by host and follower power converter circuits. The host power converter circuit generates an external demand current that is shared by multiple follower power converter circuits to regulate the voltage level on the multiple power supply nodes. The power delivery system can be scaled to different platforms of the computer system by adjusting the number of follower power converter circuits.
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Patent Agency Ranking
公开(公告)号：US20230353048A1
公开(公告)日：2023-11-02
申请号：US17661509
申请日：2022-04-29
Applicant: Apple Inc.
Inventor： Jay B. Fletcher , Nathan F. Hanagami , Sanjay Pant , Hao Zhou , Shawn Searles
Abstract: A voltage regulator circuit included in a computer system may employ a control circuit and a switch array that includes multiple switch circuits. Different groups of switch circuits that include respective groups of switch devices are coupled between an input power supply node and corresponding regulated power supply nodes. To maintain desired respective voltages on the regulated power supply nodes, the control circuit compares the voltages of the regulated power supply nodes to corresponding reference voltages and, based on results of the comparisons, opens and closes various ones of the switch devices included in the different groups of switch circuits.
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公开(公告)号：US20220399810A1
公开(公告)日：2022-12-15
申请号：US17343459
申请日：2021-06-09
Applicant: Apple Inc.
Inventor： Hao Zhou , Sarfraz Shaikh , Jay B. Fletcher , Sanjay Pant , Mark A. Yoshimoto , Vincenzo Bisogno , Shawn Searles
Abstract: A power management circuit included in a computer system regulates a voltage level of a power supply node used by other circuits in the computer system. The power management circuit includes a control circuit and multiple phase circuits coupled to the regulated power supply node via corresponding inductors. The control circuit selectively activates particular ones of the multiple phase circuits allowing them source respective currents to the regulated power supply node. The control circuit also selectively activates particular ones of other phase circuits that are external to the power management circuit and coupled to the regulated power supply node via their own corresponding inductors. Once activated, the external phase circuits source respective currents to the regulated power supply node via their corresponding inductors.
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公开(公告)号：US20220308606A1
公开(公告)日：2022-09-29
申请号：US17211527
申请日：2021-03-24
Applicant: Apple Inc.
Inventor： Shawn Searles , Fabio Gozzini , Sanjay Pant , Inder M. Sodhi
Abstract: A power converter circuit included in a computer system may include a phase circuit and a sample circuit. The phase circuit compares a voltage level of the regulated power supply node to a reference voltage to generate a demand current that is used to adjust the voltage level of the regulated power supply node. The phase circuit also digitizes the demand current and stores the resultant bit stream in a memory circuit. The sample circuit generates timestamp information that points to particular storage locations in the memory circuit that correspond to trigger events, allowing the operation of the power converter circuit to be analyzed during different circumstances as well as to adjust operating parameters of the power converter circuit.
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公开(公告)号：US20220069704A1
公开(公告)日：2022-03-03
申请号：US17005129
申请日：2020-08-27
Applicant: Apple Inc.
Inventor： Alberto Alessandro Angelo Puggelli , Ofir Gilad , Floyd L. Dankert , Hubert Attah , Sanjay Pant , Shawn Searles , Georg Diebel
Abstract: A power converter circuit that includes a switch node coupled to a regulated power supply node via an inductor is configured to regulate a voltage level of a power supply node using a particular one of multiple available operating modes. In response to receiving a command to reduce the voltage level of the power supply node, the power converter circuit begins to reduce the voltage level of the power supply node, while autonomously selecting different ones of available operating modes. The power converter circuit may compare to the voltage level of the power supply node to boundary levels and select a different operating mode when the voltage level of the power supply node exceeds one of the boundaries. By switching operating modes during the negative slew of the voltage level of the power supply node, the power converter may maintain a target efficiency during the reduction in voltage.
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公开(公告)号：US11184012B2
公开(公告)日：2021-11-23
申请号：US16803861
申请日：2020-02-27
Applicant: Apple Inc.
Inventor： Jared L. Zerbe , Brian S. Leibowitz , Sanjay Pant
Abstract: Techniques are disclosed relating to detecting supply voltage events and performing corrective actions. In some embodiments, an apparatus includes sensor circuitry and control circuitry. In some embodiments, the sensor circuitry is configured to monitor supply voltage from a power supply and detect a load release event that includes an increase in the supply voltage that meets one or more pre-determined threshold parameters. In some embodiments, the control circuitry is configured to increase clock cycle time for operations performed by circuitry powered by the supply voltage during a time interval, wherein the time interval corresponds to ringing of the supply voltage that reduces the supply voltage and results from the load release event. In some embodiments, the disclosed techniques may reduce transients in supply voltage (which may avoid equipment damage and computing errors) and may allow for reduced voltage margins (which may reduce overall power consumption).
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