公开(公告)号：US10914790B2

公开(公告)日：2021-02-09

申请号：US15881031

申请日：2018-01-26

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Kirk Yates ,  Mohamed Amin Bemat

IPC: G01R31/02 ,  G01R31/64 ,  G06F1/26 ,  G04C10/00

Abstract: Example implementations relate to performance tests of capacitors. In some examples, a controller may comprise a processing resource to measure a change in voltage of a capacitor of a circuit in response to the controller entering a test mode, determine, based on the measured change in the voltage and an impedance of the circuit, a capacitance of the capacitor, compare the determined capacitance of the capacitor to a predetermined capacitance value, and determine, based on the comparison, a performance of the capacitor.

公开(公告)号：US10673329B2

公开(公告)日：2020-06-02

申请号：US15923624

申请日：2018-03-16

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Mohamed Amin Bemat ,  Kirk Yates

IPC: H02M3/156 ,  H02M1/08 ,  H02M1/14 ,  G06F1/26 ,  H03H7/01 ,  H02M1/00

Abstract: Examples herein relate to a multiphase voltage regulator, comprising a pulse-width modulation PWM controller to output a plurality of PWM signals for driving a plurality of pluggable stand-alone voltage regulator converter stage, wherein each pluggable stand-alone voltage regulator converter stage receives one of the PWM signals and delivers a regulated output voltage signal, wherein a contribution of the regulated output voltage signals is delivered to a load connected onto a printed circuit assembly PCA.

公开(公告)号：US10516260B2

公开(公告)日：2019-12-24

申请号：US15446458

申请日：2017-03-01

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Mohamed Amin Bemat ,  Howard Leverenz ,  Daniel Humphrey

IPC: H02H3/44 ,  G01R31/02 ,  G01R19/12 ,  H02H3/04 ,  G01R19/165

Abstract: Examples disclosed herein relate to multi-node system fault management. In some of the examples disclosed herein, a fault detection circuit may distinguish between normal operating conditions of a multi-node system and faults that occur between the overcurrent protection of the system's power supplies and the hot plug protection of the system's nodes. The fault detection circuit may detect these faults by monitoring a voltage at the node's backplane connector prior to the input of the node's hot plug protection interface. If the magnitude of the monitored voltage drops below a threshold voltage at a rate that exceeds a threshold rate, the fault detection circuit may determine that a fault has occurred and may communicate the fault to the power supplies. The power supplies may receive the fault communication and shut off their power outputs to prevent the fault from causing damage to the components in the system.

公开(公告)号：US20190305586A1

公开(公告)日：2019-10-03

申请号：US15941288

申请日：2018-03-30

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Mohamed Amin Bemat ,  Kirk Yates

IPC: H02J9/06 ,  H02J7/00 ,  G06F1/30

Abstract: Example implementations relate to plug-in backup energy devices. In some examples, a plug-in backup energy device may comprise a charger, an energy storage device coupled to the charger, and a buck-boost converter coupled to the charger and the energy storage device such that the buck-boost converter maintains a charge of the energy storage device during a no-fault mode of a computing device, and in response to the plug-in backup energy device switching from a normal mode to a power supply mode as a result of the computing device experiencing a fault, regulates a voltage output of the energy storage device to provide energy to the computing device during the fault of the computing device.

公开(公告)号：US20190288673A1

公开(公告)日：2019-09-19

申请号：US15919551

申请日：2018-03-13

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Mohamed Amin Bemat ,  Daniel Humphrey ,  Stewart Gavin Goodson, II ,  Michael Delany

IPC: H03K3/017 ,  H03K17/687 ,  G05B13/02

Abstract: An example system includes a control interface and a device coupled to the control interface. The control interface may generate a parameter. The device may receive the parameter from the control interface, generate a switching waveform and current reference, adjust the switching waveform to generate an output current, and adjust the output current by using an error amplifier to provide an output current that conforms to at least one parameter.

公开(公告)号：US10281972B2

公开(公告)日：2019-05-07

申请号：US15652657

申请日：2017-07-18

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Mohamed Amin Bemat ,  Ali Salem Ba-Thunya

IPC: G06F1/32 ,  G06F1/3234 ,  G11C5/14 ,  G06F1/3287 ,  G06F1/3296

Abstract: A computing device including a motherboard. The motherboard is coupled to a memory socket, a power rail, and a regulator controller. The memory socket is able to couple to a circuit board that includes memory circuitry. The power rail provides a high-voltage power signal to power circuitry on the circuit board. The power rail provides the high-voltage power signal through the memory socket. The regulator controller provides a control signal to power circuitry on the circuit board. The control signal includes a pulse width modulation signal. An output voltage of the power circuitry on the circuit board may be controlled by the control signal.

公开(公告)号：US20180143263A1

公开(公告)日：2018-05-24

申请号：US15568460

申请日：2015-07-17

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Daniel Humphrey ,  Michael Delany ,  Mohamed Amin Bemat

IPC: G01R31/40 ,  G01R19/165

CPC classification number: G01R31/40 ,  G01R19/16538 ,  G01R31/3275 ,  H02J3/24 ,  H02J9/061 ,  H02M2001/0019

Abstract: An example system includes a failure detection circuit. The failure detection circuit is to detect a failure of a first power source electrically coupled to a first load. The failure detection circuit is to output a first signal indicating the detection of the failure of the first power source. The system also includes a current regulating circuit. The current regulating circuit is electrically coupled to the failure detection circuit. The current regulating circuit is to electrically couple a second power source to the first load based on the first signal output by the failure detection circuit. The current regulating circuit is to restrict a first current from the second power source.