公开(公告)号：US09536958B2

公开(公告)日：2017-01-03

申请号：US14301995

申请日：2014-06-11

Applicant: Infineon Technologies AG

Inventor： Hans-Joachim Schulze ,  Frank Pfirsch ,  Hans-Joerg Timme

IPC: H01L29/08 ,  H01L29/36 ,  H01L21/22 ,  H01L21/265 ,  H01L21/322 ,  H01L29/32 ,  H03H9/02 ,  H03H9/17

CPC classification number: H01L29/36 ,  H01L21/22 ,  H01L21/26513 ,  H01L21/2652 ,  H01L21/3225 ,  H01L29/32 ,  H03H9/02047 ,  H03H9/175

Abstract: The semiconductor substrate includes a high-ohmic semiconductor material with a conduction band edge and a valence band edge, separated by a bandgap, wherein the semiconductor material includes acceptor or donor impurity atoms or crystal defects, whose energy levels are located at least 120 meV from the conduction band edge, as well as from the valence band edge in the bandgap; and wherein the concentration of the impurity atoms or crystal defects is larger than 1×1012 cm−3.

Abstract translation: 半导体衬底包括具有导带边缘和价带边缘的高电阻半导体材料，带隙由带隙分开，其中半导体材料包括受体或施主杂质原子或晶体缺陷，其能级位于至少120meV 导带边缘，以及带隙中的价带边缘; 并且其中杂质原子或晶体缺陷的浓度大于1×10 12 cm -3。

公开(公告)号：US20150123142A1

公开(公告)日：2015-05-07

申请号：US14595669

申请日：2015-01-13

Applicant: Infineon Technologies AG

Inventor： Joachim Mahler ,  Ralf Otremba ,  Hans-Joachim Shulze ,  Guenther Ruhl ,  Hans-Joerg Timme

IPC: H01L23/367 ,  H01L27/02 ,  H01L27/06 ,  H01L23/373 ,  H01L27/088

CPC classification number: H01L27/0248 ,  H01L23/3677 ,  H01L23/4275 ,  H01L23/525 ,  H01L27/0676 ,  H01L27/088 ,  H01L29/49 ,  H01L29/4983 ,  H01L29/7397 ,  H01L29/7813 ,  H01L29/8611 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A power semiconductor device includes a wiring structure adjoining at least one side of a semiconductor body and comprising at least one electrically conductive compound. The power semiconductor device further includes a cooling material in the wiring structure. The cooling material is characterized by a change in structure by means of absorption of energy at a temperature TC ranging between 150° C. and 400° C.

Abstract translation: 功率半导体器件包括邻接半导体主体的至少一侧并且包括至少一种导电化合物的布线结构。 功率半导体器件还包括布线结构中的冷却材料。 冷却材料的特征在于通过在150℃和400℃之间的温度TC下吸收能量而改变结构。

公开(公告)号：US11005449B2

公开(公告)日：2021-05-11

申请号：US16210703

申请日：2018-12-05

Applicant: Infineon Technologies AG

Inventor： Ruediger Bauder ,  Andreas Bogner ,  Hans-Joerg Timme

IPC: H03H9/54 ,  H03H9/58 ,  H03H7/01 ,  H03H9/64 ,  H03H9/52 ,  H03H9/05 ,  H03H9/60 ,  H04B1/00 ,  H03H3/02 ,  H03H11/12 ,  H04B1/10 ,  H04B1/40 ,  H03H9/02 ,  H03H9/17 ,  H03H9/48 ,  H03H9/00 ,  H03H9/66 ,  H04B1/04 ,  H04B1/50 ,  H03H7/12 ,  H03H7/46 ,  H04B1/525 ,  H03F3/19 ,  H03F3/21 ,  H03H9/70 ,  H04B1/18 ,  H03J3/20 ,  H03H9/205 ,  H01L41/187 ,  H03J1/00

Abstract: A notch filter includes an inductor coupled between an input node and an output node, and a dual-resonator structure coupled between the input node, the output node, and ground.

公开(公告)号：US10965274B2

公开(公告)日：2021-03-30

申请号：US16210555

申请日：2018-12-05

Applicant: Infineon Technologies AG

Inventor： Ruediger Bauder ,  Hans-Joerg Timme ,  Stefan Helmut Schmalzl ,  Peter Pfann

IPC: H03H9/54 ,  H03H9/58 ,  H03H7/01 ,  H03H9/64 ,  H03H9/52 ,  H03H9/05 ,  H03H9/60 ,  H04B1/00 ,  H03H3/02 ,  H03H11/12 ,  H04B1/10 ,  H04B1/40 ,  H03H9/02 ,  H03H9/17 ,  H03H9/48 ,  H03H9/00 ,  H03H9/66 ,  H04B1/04 ,  H04B1/50 ,  H03H7/12 ,  H03H7/46 ,  H04B1/525 ,  H03F3/19 ,  H03F3/21 ,  H03H9/70 ,  H04B1/18 ,  H03J3/20 ,  H03H9/205 ,  H01L41/187 ,  H03J1/00

Abstract: In accordance with an embodiment, a method of operating an RF system includes filtering a first wideband RF signal using a wideband filter bank. Filtering the first RF signal includes separating the first wideband RF signal into frequency cluster signals, where each frequency cluster signal of the frequency cluster signals includes different frequency ranges, the first wideband RF signal includes multiple RF bands, and each of the different frequency ranges comprises a plurality of RF bands of the multiple RF bands. The method further includes band stop filtering at least one of the frequency cluster signals to produce a band stopped frequency cluster signal.

公开(公告)号：US20190181834A1

公开(公告)日：2019-06-13

申请号：US16210732

申请日：2018-12-05

Applicant: Infineon Technologies AG

Inventor： Ruediger Bauder ,  Andreas Bogner ,  Hans-Joerg Timme

IPC: H03H9/54 ,  H03H9/48 ,  H03H9/58 ,  H03H9/02 ,  H03H9/17

Abstract: A bandpass filter includes a capacitor coupled between an input node and an output node, and a dual-resonator structure coupled between the input node, the output node, and ground.

公开(公告)号：US09972613B2

公开(公告)日：2018-05-15

申请号：US14796682

申请日：2015-07-10

Applicant: Infineon Technologies AG

Inventor： Hans-Joachim Schulze ,  Guenther Ruhl ,  Hans-Joerg Timme

IPC: H01L29/06 ,  H01L27/02 ,  H01L23/373 ,  H01L23/367 ,  H01L23/427 ,  H01L23/495 ,  H01L29/78 ,  H01L29/739 ,  H01L29/861 ,  H01L27/24 ,  H01L45/00 ,  H01L29/43 ,  H01L23/62 ,  H01L23/525 ,  H01L23/00 ,  H01L29/417 ,  H01L29/423 ,  H01L29/16

CPC classification number: H01L27/0251 ,  H01L23/367 ,  H01L23/3738 ,  H01L23/427 ,  H01L23/4275 ,  H01L23/49562 ,  H01L23/525 ,  H01L23/62 ,  H01L24/32 ,  H01L27/24 ,  H01L27/2436 ,  H01L29/0634 ,  H01L29/1608 ,  H01L29/41725 ,  H01L29/42376 ,  H01L29/435 ,  H01L29/7393 ,  H01L29/7397 ,  H01L29/7801 ,  H01L29/7803 ,  H01L29/7813 ,  H01L29/7827 ,  H01L29/861 ,  H01L29/8611 ,  H01L45/128 ,  H01L2224/32245 ,  H01L2924/0002 ,  H01L2924/10253 ,  H01L2924/10272 ,  H01L2924/1033 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/00

Abstract: A semiconductor device includes a transistor having a plurality of transistor cells in a semiconductor body. Each transistor cell includes a control terminal and first and second load terminals. The transistor further includes a phase change material exhibiting a solid-solid phase change at a phase transition temperature Tc between 150° C. and 400° C. The control terminals of the plurality of transistor cells are electrically connected to one another.

公开(公告)号：US20170310302A1

公开(公告)日：2017-10-26

申请号：US15491711

申请日：2017-04-19

Applicant: Infineon Technologies AG

Inventor： Ruediger Bauder ,  Hans-Joerg Timme

IPC: H03H9/54 ,  H03H3/02 ,  H01L41/107 ,  H03H9/205 ,  H01L41/047

CPC classification number: H03H9/542 ,  H01L41/047 ,  H01L41/107 ,  H03H3/02 ,  H03H9/205 ,  H03H9/584 ,  H03H9/605 ,  H03H2210/012 ,  H03H2210/025

Abstract: A resonator element for use in a filter is provided. The resonator element includes a first resonator acoustically coupled to a second resonator. The first resonator has terminals for incorporation in a filter structure. A tuning circuit is coupled to the second resonator to enable tuning of the resonator element.

公开(公告)号：US09793255B2

公开(公告)日：2017-10-17

申请号：US14595669

申请日：2015-01-13

Applicant: Infineon Technologies AG

Inventor： Joachim Mahler ,  Ralf Otremba ,  Hans-Joachim Schulze ,  Guenther Ruhl ,  Hans-Joerg Timme

IPC: H01L29/06 ,  H01L27/02 ,  H01L27/088 ,  H01L27/06 ,  H01L23/427 ,  H01L23/367 ,  H01L29/49 ,  H01L29/78 ,  H01L23/525 ,  H01L29/861 ,  H01L29/739

CPC classification number: H01L27/0248 ,  H01L23/3677 ,  H01L23/4275 ,  H01L23/525 ,  H01L27/0676 ,  H01L27/088 ,  H01L29/49 ,  H01L29/4983 ,  H01L29/7397 ,  H01L29/7813 ,  H01L29/8611 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A power semiconductor device includes a wiring structure adjoining at least one side of a semiconductor body and comprising at least one electrically conductive compound. The power semiconductor device further includes a cooling material in the wiring structure. The cooling material is characterized by a change in structure by means of absorption of energy at a temperature TC ranging between 150° C. and 400° C.

公开(公告)号：US20140327003A1

公开(公告)日：2014-11-06

申请号：US13886283

申请日：2013-05-03

Applicant: INFINEON TECHNOLOGIES AG

Inventor： Edward FUERGUT ,  Irmgard Escher-Poeppel ,  Manfred Engelhardt ,  Hans-Joerg Timme ,  Hannes Eder

IPC: H01L21/66 ,  H01L21/67

CPC classification number: H01L22/24 ,  H01L21/568 ,  H01L21/67069 ,  H01L21/67253 ,  H01L21/6835 ,  H01L21/6836 ,  H01L21/784 ,  H01L22/12 ,  H01L22/26 ,  H01L22/30 ,  H01L24/19 ,  H01L24/96 ,  H01L24/97 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/94 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/1461 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2224/82 ,  H01L2924/00

Abstract: A method of processing a plurality of packaged electronic chips being connected to one another in a common substrate is provided, wherein the method comprises etching the electronic chips, detecting information indicative of an at least partial removal of an indicator structure following an exposure of the indicator structure embedded within at least a part of the electronic chips and being exposed after the etching has removed chip material above the indicator structure, and adjusting the processing upon detecting the information indicative of the at least partial removal of the indicator structure.

Abstract translation: 提供一种处理在公共基板中彼此连接的多个封装电子芯片的方法，其中所述方法包括蚀刻所述电子芯片，检测指示在所述指示符的曝光之后至少部分移除指示符结构的信息 嵌入在电子芯片的至少一部分内并且在蚀刻之后暴露出指示器结构之上的芯片材料的结构，以及在检测到指示结构的至少部分移除的信息时调整处理。

公开(公告)号：US20140319688A1

公开(公告)日：2014-10-30

申请号：US14326252

申请日：2014-07-08

Applicant: Infineon Technologies AG

Inventor： Dirk Meinhold ,  Norbert Mais ,  Reimund Engl ,  Hans-Joerg Timme ,  Alfred Vater ,  Stephan Henneck ,  Norbert Urbansky

IPC: H01L23/00 ,  H01L23/532

CPC classification number: H01L23/564 ,  H01L21/7685 ,  H01L21/76852 ,  H01L23/53219 ,  H01L23/53228 ,  H01L23/53238 ,  H01L23/5329 ,  H01L24/03 ,  H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05624 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45565 ,  H01L2224/45664 ,  H01L2224/48463 ,  H01L2224/48624 ,  H01L2224/48824 ,  H01L2224/4911 ,  H01L2924/01015 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/1301 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/20752

Abstract: In one embodiment, a method of forming a semiconductor device includes forming a metal line over a substrate and depositing an alloying material layer over a top surface of the metal line. The method further includes forming a protective layer by combining the alloying material layer with the metal line.

Abstract translation: 在一个实施例中，形成半导体器件的方法包括在衬底上形成金属线，并在金属线的顶表面上沉积合金材料层。 该方法还包括通过将合金材料层与金属线组合来形成保护层。