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    METHODS, SYSTEMS AND APPARATUS FOR DYNAMIC TEMPERATURE AWARE FUNCTIONAL SAFETY
    32.
    发明申请
    METHODS, SYSTEMS AND APPARATUS FOR DYNAMIC TEMPERATURE AWARE FUNCTIONAL SAFETY 审中-公开

    公开(公告)号：US20200379528A1

    公开(公告)日：2020-12-03

    申请号：US16795919

    申请日：2020-02-20

    Applicant: Intel Corporation

    Inventor： Amit Kumar Srivastava ,  Rao Jagannadha Rapeta ,  Asad Azam

    IPC: G06F1/20 ,  G05B15/02

    Abstract: The disclosed embodiments relate to methods, systems and apparatus for dynamic temperature aware functional safety. The disclosed embodiments provide adaptive techniques to track extended dynamic temperature range of a System-on-Chip (SOC) and automatically tune critical IP components of the SOC so that system can operate reliably even at high temperatures. The disclosed embodiments relax the overdesign of the SOC components by reusing existing components such as a ring oscillator to determine temperature at different regions of the SOC. In one embodiment, the disclosed principles use a Calibrated Ring Oscillator (CRO) temperature sensors. The CRO-based temperature sensors provide fast temperature measurement suitable for detecting dynamic temperature ranges and temperature rate of change. The CROs are existing on the SOC and do not require addition of additional sensors.

    Power management system
    35.
    发明授权
    Power management system 有权

    公开(公告)号：US10705594B2

    公开(公告)日：2020-07-07

    申请号：US15776777

    申请日：2016-11-01

    Applicant: INTEL CORPORATION

    Inventor： Amit Kumar Srivastava

    IPC: G06F1/3296 ,  G06F1/3234 ,  G06F13/42

    Abstract: A Universal Serial Bus 2.0 (USB2 or eUSB2) device includes an integrated circuit (IC) having a physical layer to send and receive data on a pair of signal lines, a repeater communicatively coupled to the physical layer via the pair of signal lines, and having a port to send and receive data on a second pair of signal lines and a power management unit to provide power to the physical layer and the repeater during an active state and to gate power to the physical layer and the repeater during a low power state.

    Adaptive read technique for multi-drop bus
    36.
    发明授权
    Adaptive read technique for multi-drop bus 有权

    公开(公告)号：US10572437B2

    公开(公告)日：2020-02-25

    申请号：US15465533

    申请日：2017-03-21

    Applicant: Intel Corporation

    Inventor： Amit Kumar Srivastava

    IPC: G06F13/42

    Abstract: An apparatus is provided which comprises: a data circuitry to send and receive data to and from one or more devices coupled to the data circuitry via a first transmission line; and a first adjustable clock buffer coupled to the data circuitry, wherein the first adjustable clock buffer is to adjust a delay to an edge of a read clock according to a response time of the one or more devices.

    Die interconnect signal management devices and methods
    37.
    发明授权
    Die interconnect signal management devices and methods 有权

    公开(公告)号：US10528103B2

    公开(公告)日：2020-01-07

    申请号：US15622775

    申请日：2017-06-14

    Applicant: Intel Corporation

    Inventor： Chenchu Punnarao Bandi ,  Amit Kumar Srivastava

    IPC: G06F1/00 ,  G06F1/26 ,  H04B3/54 ,  G06F1/06

    Abstract: A microelectronic assembly may include a first microelectronic device, a second microelectronic device, a first signal link, a second signal link, and a first power connection. The first microelectronic device may include a first interface powered at a first voltage. The second microelectronic device may include a second interface powered at a second voltage. The first signal link may supply a first signal at the first voltage from the first interface to the second interface. The second signal link may supply a second signal at the second voltage from the second interface to the first interface. The first power connection may supply a first reference signal at the first voltage from the first interface to the second interface.

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