公开(公告)号：US09147664B2

公开(公告)日：2015-09-29

申请号：US14051548

申请日：2013-10-11

Applicant: MEDIATEK Inc.

Inventor： Nan-Jang Chen

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/00 ,  H01L23/482 ,  H01L23/31

CPC classification number: H01L24/30 ,  H01L23/3107 ,  H01L23/3121 ,  H01L23/4824 ,  H01L23/49827 ,  H01L23/50 ,  H01L23/64 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/19107 ,  H05K1/181 ,  H05K3/222 ,  H05K3/284 ,  H05K2203/049 ,  H05K2203/173 ,  H01L2924/12042 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/0665

Abstract: A semiconductor package is provided. The semiconductor package includes a substrate, a first pad, a second, a first conductive element, a surface mount device, a first bonding wire and a molding compound layer. The first pad, the second pad, and the first conductive element are formed on the substrate. The surface mount device is mounted on the first pad and the second pad. The first bonding wire electrically connects the first conductive element and the first pad. The molding compound layer encapsulates the substrate, the first pad, the second pad, the first conductive element, the bonding wire and the surface mount device.

Abstract translation: 提供半导体封装。 半导体封装包括衬底，第一衬垫，第二衬底，第一导电元件，表面贴装器件，第一接合线和模塑复合层。 第一焊盘，第二焊盘和第一导电元件形成在基板上。 表面安装器件安装在第一焊盘和第二焊盘上。 第一接合线电连接第一导电元件和第一焊盘。 模塑复合层封装基板，第一焊盘，第二焊盘，第一导电元件，接合线和表面安装装置。

公开(公告)号：US20150091147A1

公开(公告)日：2015-04-02

申请号：US14566689

申请日：2014-12-10

Applicant: MEDIATEK INC.

Inventor： Nan-Jang Chen

IPC: H01L23/495

CPC classification number: H01L23/49589 ,  H01L23/49503 ,  H01L23/49517 ,  H01L23/49541 ,  H01L23/49575 ,  H01L2224/32245 ,  H01L2224/48095 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/49109 ,  H01L2224/49113 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2924/181 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A semiconductor package includes a die pad, wherein a semiconductor die is mounted on the die pad; a plurality of leads comprising a power lead disposed along a peripheral edge of the die pad; at least one connecting bar connecting with the die pad; and a power bar disposed on one side of the connecting bar, wherein the power bar is integrally connected to the power lead. A capacitor is mounted between the power bar and the connecting bar.

Abstract translation: 半导体封装包括管芯焊盘，其中半导体管芯安装在管芯焊盘上; 多个引线，包括沿着所述管芯焊盘的周缘设置的电源引线; 至少一个与所述管芯焊盘连接的连接杆; 以及设置在所述连接杆的一侧上的电源杆，其中所述电源杆与所述电源线一体地连接。 电容器安装在电源杆和连接杆之间。