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    ANALYSIS OF MEMORY SUB-SYSTEMS BASED ON THRESHOLD DISTRIBUTIONS
    32.
    发明申请
    ANALYSIS OF MEMORY SUB-SYSTEMS BASED ON THRESHOLD DISTRIBUTIONS 有权

    公开(公告)号：US20210192333A1

    公开(公告)日：2021-06-24

    申请号：US16722507

    申请日：2019-12-20

    Applicant: Micron Technology, Inc.

    Inventor： Aswin Thiruvengadam ,  Daniel L. Lowrance ,  Joshua Phelps ,  Peter B. Harrington

    IPC: G06N3/08 ,  G06N3/04 ,  G06F11/22

    Abstract: Disclosed is a system comprising a memory component having a plurality of memory cells capable of being in a plurality of states, each state of the plurality of states corresponding to a value stored by the memory cell, and a processing device, operatively coupled with the memory component, to perform operations comprising: obtaining, for the plurality of memory cells, a plurality of distributions of threshold voltages, wherein each of the plurality of distributions corresponds to one of the plurality of states, classifying each of the plurality of distributions among one of a plurality of classes, generating a vector comprising a plurality of components, wherein each of the plurality of components represents the class of a respective one of the plurality of distributions, and processing, using a classifier, the generated vector to determine a likelihood that the memory component will fail within a target period of time.

    TRIM SETTING DETERMINATION FOR A MEMORY DEVICE
    34.
    发明申请
    TRIM SETTING DETERMINATION FOR A MEMORY DEVICE 审中-公开

    公开(公告)号：US20200035318A1

    公开(公告)日：2020-01-30

    申请号：US16591686

    申请日：2019-10-03

    Applicant: Micron Technology, Inc.

    Inventor： Aswin Thiruvengadam ,  Daniel L. Lowrance ,  Peter Feeley

    IPC: G11C29/02 ,  G06F12/02 ,  G11C16/10

    Abstract: The present disclosure includes apparatuses and methods related to a memory system including a controller and an array of memory cells. An example apparatus can include a controller configured to receive operational characteristics of an array of memory cells based on prior operations performed by the array of memory cells, determine a set of trim settings for the array of memory cells based on the operational characteristics of the array of memory cells, wherein the set of trim settings are associated with desired operational characteristics for the array of memory cells, and send the set of trim settings to the array of memory cells.

    Compensation for threshold voltage variation of memory cell components
    36.
    发明授权
    Compensation for threshold voltage variation of memory cell components 有权

    公开(公告)号：US10153019B2

    公开(公告)日：2018-12-11

    申请号：US15689922

    申请日：2017-08-29

    Applicant: Micron Technology, Inc.

    Inventor： Aswin Thiruvengadam ,  Hernan A. Castro

    IPC: G11C11/16 ,  G11C11/22

    Abstract: Methods, systems, and devices for operating a ferroelectric memory cell or cells are described. Before reading a memory cell, the voltage on an access line of the memory cell may be initialized to a value associated with the threshold voltage of a switching component in electronic communication with the memory cell. The voltage may be initialized by reducing the existing voltage on the access line to the value. The switching component or an additional pull down device, or both, may be used to reduce the voltage of the access line. After the access line has been initialized to the value, the read operation may be triggered.

    COMPENSATION FOR THRESHOLD VOLTAGE VARIATION OF MEMORY CELL COMPONENTS
    37.
    发明申请
    COMPENSATION FOR THRESHOLD VOLTAGE VARIATION OF MEMORY CELL COMPONENTS 审中-公开

    公开(公告)号：US20180082728A1

    公开(公告)日：2018-03-22

    申请号：US15689922

    申请日：2017-08-29

    Applicant: Micron Technology, Inc.

    Inventor： Aswin Thiruvengadam ,  Hernan A. Castro

    IPC: G11C11/22

    CPC classification number: G11C11/221 ,  G11C11/16 ,  G11C11/2255 ,  G11C11/2259 ,  G11C11/2273

    Abstract: Methods, systems, and devices for operating a ferroelectric memory cell or cells are described. Before reading a memory cell, the voltage on an access line of the memory cell may be initialized to a value associated with the threshold voltage of a switching component in electronic communication with the memory cell. The voltage may be initialized by reducing the existing voltage on the access line to the value. The switching component or an additional pull down device, or both, may be used to reduce the voltage of the access line. After the access line has been initialized to the value, the read operation may be triggered.

    TRIM SETTING DETERMINATION FOR A MEMORY DEVICE
    39.
    发明申请
    TRIM SETTING DETERMINATION FOR A MEMORY DEVICE 有权

    公开(公告)号：US20250166719A1

    公开(公告)日：2025-05-22

    申请号：US19028149

    申请日：2025-01-17

    Applicant: Micron Technology, Inc.

    Inventor： Aswin Thiruvengadam ,  Daniel L. Lowrance ,  Peter Feeley

    IPC: G11C29/02 ,  G06F12/02 ,  G11C16/10 ,  G11C29/44

    Abstract: The present disclosure includes apparatuses and methods related to a memory system including a controller and an array of memory cells. An example apparatus can include a controller configured to receive operational characteristics of an array of memory cells based on prior operations performed by the array of memory cells, determine a set of trim settings for the array of memory cells based on the operational characteristics of the array of memory cells, wherein the set of trim settings are associated with desired operational characteristics for the array of memory cells, and send the set of trim settings to the array of memory cells.

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