公开(公告)号：US06737754B2

公开(公告)日：2004-05-18

申请号：US09777833

申请日：2001-02-05

Applicant: Qing Ma ,  Jin Lee ,  Chun Mu ,  Quat Vu ,  Jian Li ,  Larry Mosley

Inventor： Qing Ma ,  Jin Lee ,  Chun Mu ,  Quat Vu ,  Jian Li ,  Larry Mosley

IPC: H01L2328

CPC classification number: H01L23/3121 ,  H01L23/4334 ,  H01L2924/0002 ,  H01L2924/12044 ,  H01L2924/00

Abstract: A semiconductor device having a multilayer laminate that includes a thermally stable, flexible polymer film, a semiconductor die, a molding compound, and a heat dissipation member. The die has an active surface and an inactive surface, in which the active surface includes a plurality of contacts. The molding compound contacts both the laminate and the die, but does not contact the die's active or inactive surfaces. The heat dissipation member contacts the die's inactive surface.

Abstract translation: 一种具有多层叠层的半导体器件，其包括热稳定的，柔性的聚合物膜，半导体管芯，模塑料和散热构件。 模具具有活性表面和非活性表面，其中活性表面包括多个触点。 模塑料与层压体和模具接触，但不接触模具的活性或非活性表面。 散热构件接触模具的非活性表面。

公开(公告)号：US06706981B1

公开(公告)日：2004-03-16

申请号：US10389725

申请日：2003-03-13

Applicant: Qing Ma ,  Kramadhati V. Ravi ,  Valluri Rao

Inventor： Qing Ma ,  Kramadhati V. Ravi ,  Valluri Rao

IPC: H01H5700

CPC classification number: H01P1/127 ,  H01H59/0009 ,  H01H2001/0052

Abstract: A switch structure having multiple contact surfaces that may contact each other. One or more of the contact surfaces may be coated with a resilient material such as diamond.

Abstract translation: 具有可以彼此接触的多个接触表面的开关结构。 一个或多个接触表面可以用诸如金刚石的弹性材料涂覆。

公开(公告)号：US06562653B1

公开(公告)日：2003-05-13

申请号：US09668770

申请日：2000-09-22

Applicant: Qing Ma ,  Harry Fujimoto

Inventor： Qing Ma ,  Harry Fujimoto

IPC: H01L2150

CPC classification number: H01L23/49827 ,  H01L25/0652 ,  H01L2224/16 ,  H01L2924/3011

Abstract: An integrated circuit package which includes an integrated circuit that is connected to a silicon substrate. The silicon substrate may have a via. The package may further include a solder bump that is attached to both the integrated circuit and the silicon subtstrate. The silicon substrate has a coefficient of thermal expansion that matches the coefficient of thermal expansion of the integrated circuit.

Abstract translation: 一种集成电路封装，其包括连接到硅衬底的集成电路。 硅衬底可以具有通孔。 该封装还可以包括连接到集成电路和硅基板两者的焊料凸块。 硅衬底具有与集成电路的热膨胀系数相匹配的热膨胀系数。

公开(公告)号：US06362091B1

公开(公告)日：2002-03-26

申请号：US09524766

申请日：2000-03-14

Applicant: Ebrahim Andideh ,  Qing Ma ,  Quan Tran ,  Steve Towle

Inventor： Ebrahim Andideh ,  Qing Ma ,  Quan Tran ,  Steve Towle

IPC: H01L214763

CPC classification number: H01L23/5329 ,  H01L21/76801 ,  H01L21/76807 ,  H01L21/76829 ,  H01L21/76835 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An improved semiconductor device and method for making it. That semiconductor device includes a first insulating layer, having a low-k dielectric constant that preferably comprises a carbon doped oxide, that is formed on a substrate. The device further includes a second layer, which is formed on the first layer, that has a relatively high dielectric constant and superior mechanical strength. The second layer is preferably under compressive stress. A third layer may be formed on the second layer, which has a relatively low dielectric constant and relatively poor mechanical strength, and a fourth layer may be formed on the third layer, which has a relatively high dielectric constant and superior mechanical strength.

公开(公告)号：US06271469B1

公开(公告)日：2001-08-07

申请号：US09438221

申请日：1999-11-12

Applicant: Qing Ma ,  Chun Mu ,  Harry Fujimoto

Inventor： Qing Ma ,  Chun Mu ,  Harry Fujimoto

IPC: H01L2302

CPC classification number: H01L21/561 ,  H01L21/56 ,  H01L21/568 ,  H01L23/3114 ,  H01L23/4334 ,  H01L23/485 ,  H01L24/19 ,  H01L24/96 ,  H01L24/97 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16225 ,  H01L2224/20 ,  H01L2224/211 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01078 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/18162 ,  H01L2924/3025 ,  H01L2924/351 ,  H01L2924/00

Abstract: A microelectronic package including a microelectronic die having an active surface and at least one side. An encapsulation material is disposed adjacent the microelectronic die side(s), wherein the encapsulation material includes at least one surface substantially planar to the microelectronic die active surface. A first dielectric material layer may be disposed on at least a portion of the microelectronic die active surface and the encapsulation material surface. At least one conductive trace is then disposed on the first dielectric material layer. The conductive trace(s) is in electrical contact with the microelectronic die active surface. At least one conductive trace extends vertically adjacent the microelectronic die active surface and vertically adjacent the encapsulation material surface.

Abstract translation: 一种微电子封装，其包括具有活性表面和至少一个侧面的微电子管芯。 封装材料邻近微电子管芯侧设置，其中封装材料包括至少一个与微电子管芯有效表面平面的表面。 第一介电材料层可以设置在微电子管芯有源表面和封装材料表面的至少一部分上。 然后至少一个导电迹线设置在第一介电材料层上。 导电迹线与微电子管芯有源表面电接触。 至少一个导电迹线垂直邻近微电子管芯有源表面并垂直邻近封装材料表面延伸。

公开(公告)号：US06229216B1

公开(公告)日：2001-05-08

申请号：US09228323

申请日：1999-01-11

Applicant: Qing Ma ,  Harry Fujimoto

Inventor： Qing Ma ,  Harry Fujimoto

IPC: H01L2310

CPC classification number: H01L23/49827 ,  H01L25/0652 ,  H01L2224/16 ,  H01L2924/3011

Abstract: An integrated circuit package which includes an integrated circuit that is connected to a silicon substrate. The silicon substrate may have a via. The package may further include a solder bump that is attached to both the integrated circuit and the silicon substrate. The silicon substrate has a coefficient of thermal expansion that matches the coefficient of thermal expansion of the integrated circuit.

Abstract translation: 一种集成电路封装，其包括连接到硅衬底的集成电路。 硅衬底可以具有通孔。 封装还可以包括连接到集成电路和硅衬底两者的焊料凸块。 硅衬底具有与集成电路的热膨胀系数相匹配的热膨胀系数。

公开(公告)号：US09420707B2

公开(公告)日：2016-08-16

申请号：US12653722

申请日：2009-12-17

Applicant: Qing Ma ,  Chuan Hu ,  Patrick Morrow

Inventor： Qing Ma ,  Chuan Hu ,  Patrick Morrow

IPC: H05K1/11 ,  H05K3/46 ,  H01L23/498 ,  H05K3/42

CPC classification number: H01L23/49822 ,  B32B2457/08 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/3675 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49894 ,  H01L24/17 ,  H01L24/32 ,  H01L24/73 ,  H01L2224/16227 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2224/81815 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01016 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01024 ,  H01L2924/01025 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/05442 ,  H01L2924/14 ,  H01L2924/15184 ,  H01L2924/15788 ,  H01L2924/16251 ,  H05K3/42 ,  H05K3/4605 ,  H05K2201/0195 ,  H05K2201/096 ,  Y10T156/10 ,  H01L2924/00

Abstract: Disclosed are embodiments of a substrate for an integrated circuit (IC) device. The substrate includes a core comprised of two or more discrete glass layers that have been bonded together. A separate bonding layer may be disposed between adjacent glass layers to couple these layers together. The substrate may also include build-up structures on opposing sides of the multi-layer glass core, or perhaps on one side of the core. Electrically conductive terminals may be formed on both sides of the substrate, and an IC die may be coupled with the terminals on one side of the substrate. The terminals on the opposing side may be coupled with a next-level component, such as a circuit board. One or more conductors extend through the multi-layer glass core, and one or more of the conductors may be electrically coupled with the build-up structures disposed over the core. Other embodiments are described and claimed.

Abstract translation: 公开了用于集成电路（IC）装置的基板的实施例。 衬底包括由已经结合在一起的两个或更多个离散的玻璃层组成的芯。 可以在相邻的玻璃层之间设置单独的粘合层，以将这些层连接在一起。 衬底还可以包括在多层玻璃芯的相对侧上或者可能在芯的一侧上的堆积结构。 导电端子可以形成在基板的两侧，并且IC管芯可以与基板的一侧上的端子耦合。 相对侧上的端子可以与诸如电路板的下一级组件耦合。 一个或多个导体延伸通过多层玻璃芯，并且一个或多个导体可以与布置在芯上的积聚结构电耦合。 描述和要求保护其他实施例。

公开(公告)号：US09368429B2

公开(公告)日：2016-06-14

申请号：US13631744

申请日：2012-09-28

Applicant: Qing Ma ,  Johanna M. Swan ,  Min Tao ,  Charles A. Gealer ,  Edward A. Zarbock

Inventor： Qing Ma ,  Johanna M. Swan ,  Min Tao ,  Charles A. Gealer ,  Edward A. Zarbock

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/00 ,  G01P15/08 ,  B81C1/00 ,  H01L25/065 ,  H01L23/498 ,  H01L23/538

CPC classification number: B81C1/00301 ,  B81B7/007 ,  B81C1/00238 ,  B81C2203/0145 ,  G01P15/0802 ,  H01L23/481 ,  H01L23/49816 ,  H01L23/5384 ,  H01L24/03 ,  H01L25/0652 ,  H01L2224/0401 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/73204 ,  H01L2924/01327 ,  H01L2924/07811 ,  H01L2924/12042 ,  H01L2924/1461 ,  H01L2924/00 ,  H01L2924/014

Abstract: Integration of sensor chips with integrated circuit (IC) chips. At least a first sensor chip including a first sensor is affixed to a first side of an interposer to hermitically seal the first sensor within a first cavity. An IC chip is affixed to a second side of the interposer opposite the first sensor, the IC chip is electrically coupled to the first sensor by a through via in the interposer. In embodiments, the first sensor includes a MEMS device and the IC chip comprises a circuit to amplify a signal from the MEMS device. The interposer may be made of glass, with the first sensor chip and the IC chip flip-chip bonded to the interposer by compression or solder. Lateral interconnect traces provide I/O between the devices on the interposer and/or a PCB upon which the interpose is affixed.

Abstract translation: 传感器芯片与集成电路（IC）芯片的集成。 至少包括第一传感器的第一传感器芯片固定到插入件的第一侧，以将第一传感器密封在第一腔内。 IC芯片被固定到与第一传感器相对的插入件的第二侧，IC芯片通过插入器中的通孔电耦合到第一传感器。 在实施例中，第一传感器包括MEMS器件，并且IC芯片包括放大来自MEMS器件的信号的电路。 插入器可以由玻璃制成，其中第一传感器芯片和IC芯片倒装芯片通过压缩或焊接接合到插入器。 横向互连迹线在插入件上的器件和/或其上插入插入物的PCB之间提供I / O。

公开(公告)号：US09173918B2

公开(公告)日：2015-11-03

申请号：US13879558

申请日：2011-10-14

Applicant: Zhiquan Zhang ,  G. Burkhard Mackensen ,  Qing Ma ,  Mihai V. Podgoreanu

Inventor： Zhiquan Zhang ,  G. Burkhard Mackensen ,  Qing Ma ,  Mihai V. Podgoreanu

IPC: A61K38/06 ,  C07K5/08 ,  A61P13/12 ,  A61K38/07 ,  A61K38/17

CPC classification number: A61K38/07 ,  A61K38/1709

Abstract: The present invention provides a method of treating, ameliorating and/or preventing cardiac surgery-associated acute kidney injury (AKI) in a subject, comprising administering to the subject a therapeutically effective amount of an annexin A1 (ANXA1) peptide such that the AKI is treated, ameliorated and/or prevented.

Abstract translation: 本发明提供了治疗，改善和/或预防受试者心脏手术相关的急性肾损伤（AKI）的方法，其包括向受试者施用治疗有效量的膜联蛋白A1（ANXA1）肽，使得AKI为 治疗，改善和/或预防。

公开(公告)号：US08940234B2

公开(公告)日：2015-01-27

申请号：US13444045

申请日：2012-04-11

Applicant: Yuegang Zhang ,  Andrew A. Berlin ,  Qing Ma ,  Li-Peng Wang ,  Valluri Rao ,  Mineo Yamakawa

Inventor： Yuegang Zhang ,  Andrew A. Berlin ,  Qing Ma ,  Li-Peng Wang ,  Valluri Rao ,  Mineo Yamakawa

IPC: G01N15/06 ,  G01N33/543 ,  B82Y15/00 ,  B82Y30/00 ,  G01N29/02 ,  G01N29/036 ,  G01N29/34 ,  G01N33/00 ,  G01N29/24 ,  G01N27/12

CPC classification number: G01N33/54373 ,  B82Y15/00 ,  B82Y30/00 ,  G01N27/126 ,  G01N29/022 ,  G01N29/036 ,  G01N29/2437 ,  G01N29/348 ,  G01N33/0031 ,  G01N2291/02466 ,  G01N2291/0255 ,  G01N2291/0256 ,  G01N2291/0426 ,  Y10T436/11 ,  Y10T436/143333 ,  Y10T436/144444 ,  Y10T436/25375

Abstract: Systems and methods for detecting the presence of biomolecules in a sample using biosensors that incorporate resonators which have functionalized surfaces for reacting with target biomolecules. In one embodiment, a device includes a piezoelectric resonator having a functionalized surface configured to react with target molecules, thereby changing the mass and/or charge of the resonator which consequently changes the frequency response of the resonator. The resonator's frequency response after exposure to a sample is compared to a reference, such as the frequency response before exposure to the sample, a stored baseline frequency response or a control resonator's frequency response.

Abstract translation: 使用包含具有功能化表面以与靶生物分子反应的共振器的生物传感器来检测样品中存在生物分子的系统和方法。 在一个实施例中，器件包括压电谐振器，其具有被配置为与靶分子反应的官能化表面，从而改变谐振器的质量和/或电荷，从而改变谐振器的频率响应。 将曝光后的谐振器频率响应与参考值进行比较，例如在暴露于采样之前的频率响应，存储的基准频率响应或控制谐振器的频率响应。