公开(公告)号：US10790268B2

公开(公告)日：2020-09-29

申请号：US16821202

申请日：2020-03-17

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： DeokKyung Yang ,  HunTeak Lee ,  HeeSoo Lee

IPC: H01L23/552 ,  H01L25/10 ,  H01L25/00 ,  H01L23/538 ,  H01L21/48 ,  H01L23/00 ,  H01L21/56 ,  H01L23/31

Abstract: A semiconductor device has a first substrate and a semiconductor die disposed over the first substrate. A conductive pillar is formed on the first substrate. A first encapsulant is deposited over the first substrate and semiconductor die after forming the conductive pillar. A groove is formed in the first encapsulant around the conductive pillar. A first passive device is disposed over a second substrate. A second encapsulant is deposited over the first passive device and second substrate. The first substrate is mounted over the second substrate. A shielding layer is formed over the second encapsulant. A second passive device can be mounted over the second substrate opposite the first passive device and outside a footprint of the first substrate.

公开(公告)号：US20200219859A1

公开(公告)日：2020-07-09

申请号：US16821202

申请日：2020-03-17

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： DeokKyung Yang ,  HunTeak Lee ,  HeeSoo Lee

IPC: H01L25/10 ,  H01L25/00 ,  H01L23/538 ,  H01L23/552 ,  H01L21/48 ,  H01L23/00 ,  H01L21/56

Abstract: A semiconductor device has a first substrate and a semiconductor die disposed over the first substrate. A conductive pillar is formed on the first substrate. A first encapsulant is deposited over the first substrate and semiconductor die after forming the conductive pillar. A groove is formed in the first encapsulant around the conductive pillar. A first passive device is disposed over a second substrate. A second encapsulant is deposited over the first passive device and second substrate. The first substrate is mounted over the second substrate. A shielding layer is formed over the second encapsulant. A second passive device can be mounted over the second substrate opposite the first passive device and outside a footprint of the first substrate.

公开(公告)号：US20200219847A1

公开(公告)日：2020-07-09

申请号：US16826169

申请日：2020-03-21

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： DeokKyung Yang ,  YongMin Kim ,  JaeHyuk Choi ,  YeoChan Ko ,  HeeSoo Lee

IPC: H01L25/065 ,  H01L21/56 ,  H01L25/00 ,  H01L23/552 ,  H01L21/683 ,  H01L23/31 ,  H01L25/16

Abstract: A semiconductor device includes a substrate with an opening formed through the substrate. A first electronic component is disposed over the substrate outside a footprint of the first opening. A second electronic component is disposed over the substrate opposite the first electrical component. A third electronic component is disposed over the substrate adjacent to the first electronic component. The substrate is disposed in a mold including a second opening of the mold over a first side of the substrate. The mold contacts the substrate between the first electronic component and the third electronic component. An encapsulant is deposited into the second opening. The encapsulant flows through the first opening to cover a second side of the substrate. In some embodiments, a mold film is disposed in the mold, and an interconnect structure on the substrate is embedded in the mold film.

公开(公告)号：US20200013738A1

公开(公告)日：2020-01-09

申请号：US16027731

申请日：2018-07-05

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： DeokKyung Yang ,  HunTeak Lee ,  OhHan Kim ,  HeeSoo Lee ,  DaeHyeok Ha ,  Wanil Lee

IPC: H01L23/00 ,  H01L23/538

Abstract: A semiconductor device has a first substrate and a semiconductor die disposed over the first substrate. A second substrate has a multi-layered conductive post. The conductive post has a first conductive layer and a second conductive layer formed over the first conductive layer. The first conductive layer is wider than the second conductive layer. A portion of the conductive post can be embedded within the second substrate. The second substrate is disposed over the first substrate adjacent to the semiconductor die. An encapsulant is deposited around the second substrate and semiconductor die. An opening is formed in the second substrate aligned with the conductive post. An interconnect structure is formed in the opening to contact the conductive post. A discrete electrical component is disposed over a surface of the first substrate opposite the semiconductor die. A shielding layer is formed over the discrete electrical component.

公开(公告)号：US20180158779A1

公开(公告)日：2018-06-07

申请号：US15807833

申请日：2017-11-09

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： DeokKyung Yang ,  Woonjae Beak ,  YiSu Park ,  OhHan Kim ,  HunTeak Lee ,  HeeSoo Lee

IPC: H01L23/538 ,  H01L23/31 ,  H01L23/552 ,  H01L23/00 ,  H01L21/48 ,  H01L21/56

Abstract: A semiconductor device has a substrate with a first opening and second opening formed in the substrate. A first semiconductor component is disposed on the substrate. The substrate is disposed on a carrier. A second semiconductor component is disposed on the carrier in the first opening of the substrate. A third semiconductor component is disposed in the second opening. The third semiconductor component is a semiconductor package in some embodiments. A first shielding layer may be formed over the semiconductor package. An encapsulant is deposited over the substrate, first semiconductor component, and second semiconductor component. A shielding layer may be formed over the encapsulant.

公开(公告)号：US20250022792A1

公开(公告)日：2025-01-16

申请号：US18351300

申请日：2023-07-12

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： YongMoo Shin ,  HeeSoo Lee ,  SuJeong Kwon

IPC: H01L23/498 ,  H01L21/324 ,  H01L21/56 ,  H01L23/31

Abstract: A semiconductor device has a substrate. An electrical component is disposed over the substrate. An encapsulant is deposited over the electrical component. A conductive layer is formed over the substrate opposite the electrical component after depositing the encapsulant. The conductive layer is deposited as a plurality of graphene-coated metal balls in a matrix. The conductive layer is sintered by intensive pulsed light (IPL) irradiation.

公开(公告)号：US20240413095A1

公开(公告)日：2024-12-12

申请号：US18329871

申请日：2023-06-06

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： YongMoo Shin ,  HeeSoo Lee ,  SuJeong Kwon

IPC: H01L23/552 ,  H01L21/324 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31

Abstract: A semiconductor device has a substrate and an electrical component disposed over the substrate. An encapsulant is deposited over the electrical component. A shielding layer is formed over the encapsulant. The shielding layer includes a plurality of graphene-coated metal balls in a matrix. The shielding layer is sintered using intensive pulsed light (IPL) radiation.

公开(公告)号：US12046564B2

公开(公告)日：2024-07-23

申请号：US18309951

申请日：2023-05-01

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： HunTeak Lee ,  Deokkyung Yang ,  HeeSoo Lee

IPC: H01L23/552 ,  H01L21/56 ,  H01L21/78 ,  H01L23/00 ,  H01L23/31

CPC classification number: H01L23/552 ,  H01L21/56 ,  H01L21/78 ,  H01L23/3107 ,  H01L24/09 ,  H01L24/17

Abstract: A semiconductor device has a substrate. A conductive layer is formed over the substrate and includes a ground plane. A first tab of the conductive layer extends from the ground plane and less than half-way across a saw street of the substrate. A shape of the first tab can include elliptical, triangular, parallelogram, or rectangular portions, or any combination thereof. An encapsulant is deposited over the substrate. The encapsulant and substrate are singulated through the saw street. An electromagnetic interference (EMI) shielding layer is formed over the encapsulant. The EMI shielding layer contacts the first tab of the conductive layer.

公开(公告)号：US20240194628A1

公开(公告)日：2024-06-13

申请号：US18064149

申请日：2022-12-09

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： YongMoo Shin ,  HeeSoo Lee ,  SuJeong Kwon

IPC: H01L23/00 ,  H01L23/373 ,  H01L23/498 ,  H01L25/065 ,  H01L25/16

CPC classification number: H01L24/29 ,  H01L23/3737 ,  H01L23/49805 ,  H01L23/49844 ,  H01L24/27 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/162 ,  H01L23/49816 ,  H01L24/49 ,  H01L2224/27452 ,  H01L2224/2929 ,  H01L2224/29347 ,  H01L2224/29493 ,  H01L2224/29499 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/48011 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48245 ,  H01L2224/48464 ,  H01L2224/4903 ,  H01L2224/49052 ,  H01L2224/49109 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2924/3511

Abstract: A semiconductor device has a substrate and an adhesive layer with a graphene core shell deposited over a surface of the substrate. An electrical component is affixed to the substrate with the adhesive layer. A bond wire is connected between the electrical component and substrate. The graphene core shell has a copper core and graphene coating over the copper core. The graphene coated core shell is embedded within a matrix. The graphene core shells within the adhesive layer to form a thermal path. The matrix can be a thermoset material or polymer or composite epoxy type matrix. The graphene core shell is embedded within the thermoset material or polymer or composite epoxy type matrix. The adhesive layer with graphene core shell is useful for die attachment. The graphene core adhesive layer provides exceptional heat dissipation, shock absorption, and vibration dampening.

公开(公告)号：US11676911B2

公开(公告)日：2023-06-13

申请号：US17645257

申请日：2021-12-20

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： HunTeak Lee ,  Deokkyung Yang ,  HeeSoo Lee

IPC: H01L23/552 ,  H01L23/31 ,  H01L21/56 ,  H01L23/00 ,  H01L21/78

CPC classification number: H01L23/552 ,  H01L21/56 ,  H01L21/78 ,  H01L23/3107 ,  H01L24/09 ,  H01L24/17

Abstract: A semiconductor device has a substrate. A conductive layer is formed over the substrate and includes a ground plane. A first tab of the conductive layer extends from the ground plane and less than half-way across a saw street of the substrate. A shape of the first tab can include elliptical, triangular, parallelogram, or rectangular portions, or any combination thereof. An encapsulant is deposited over the substrate. The encapsulant and substrate are singulated through the saw street. An electromagnetic interference (EMI) shielding layer is formed over the encapsulant. The EMI shielding layer contacts the first tab of the conductive layer.