公开(公告)号：US20200282484A1

公开(公告)日：2020-09-10

申请号：US16881377

申请日：2020-05-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jinseong HEO ,  Yunseong LEE ,  Sanghyun JO

IPC: B23K3/08 ,  B23K3/06 ,  H01L23/00

Abstract: Provided are a logic switching device and a method of manufacturing the same. The logic switching device may include a domain switching layer adjacent to a gate electrode. The domain switching layer may include a ferroelectric material region and an anti-ferroelectric material region. The domain switching layer may be a non-memory element. The logic switching device may include a channel, a source and a drain both connected to the channel, the gate electrode arranged to face the channel, and the domain switching layer provided between the channel and the gate electrode.

公开(公告)号：US20200058658A1

公开(公告)日：2020-02-20

申请号：US16244243

申请日：2019-01-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jinseong HEO ,  Yunseong LEE ,  Sanghyun JO

IPC: H01L27/1159 ,  H01L29/78 ,  G11C11/22 ,  H01L21/28 ,  H01L29/66

Abstract: Provided are an electronic device and a method of manufacturing the same. The electronic device may include a first device provided on a first region of a substrate; and a second device provided on a second region of the substrate, wherein the first device may include a first domain layer including a ferroelectric domain and a first gate electrode on the first domain layer, and the second device may include a second domain layer including a ferroelectric domain and a second gate electrode on the second domain layer. The first domain layer and the second domain layer may have different characteristics from each other at a polarization change according to an electric field. At the polarization change according to the electric field, the first domain layer may have substantially a non-hysteretic behavior characteristic and the second domain layer may have a hysteretic behavior characteristic.

公开(公告)号：US20180358470A1

公开(公告)日：2018-12-13

申请号：US15892850

申请日：2018-02-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaeho LEE ,  Haeryong KIM ,  Sanghyun JO ,  Hyeonjin SHIN

IPC: H01L29/788 ,  H01L29/423 ,  H01L29/49 ,  H01L27/11521 ,  G11C11/54 ,  G11C11/56

CPC classification number: H01L29/7887 ,  B82Y10/00 ,  G11C11/54 ,  G11C11/56 ,  G11C11/5621 ,  G11C11/5628 ,  G11C11/5642 ,  G11C13/025 ,  G11C16/0441 ,  G11C16/10 ,  G11C16/26 ,  G11C2211/5612 ,  G11C2213/35 ,  H01L21/28273 ,  H01L27/11521 ,  H01L29/0673 ,  H01L29/42324 ,  H01L29/42332 ,  H01L29/49 ,  H01L29/78684 ,  H01L29/78687

Abstract: Provided are nonvolatile memory devices including 2-dimensional (2D) material and apparatuses including the nonvolatile memory devices. A nonvolatile memory device may include a storage stack including a plurality of charge storage layers between a channel element and a gate electrode facing the channel element. The plurality of charge storage layers may include a 2D material. An interlayer barrier layer may be further provided between the plurality of charge storage layers. The nonvolatile memory device may have a multi-bit or multi-level memory characteristic due to the plurality of charge storage layers.

公开(公告)号：US20240274714A1

公开(公告)日：2024-08-15

申请号：US18634295

申请日：2024-04-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sangwook KIM ,  Yunseong LEE ,  Sanghyun JO ,  Jinseong HEO

IPC: H01L29/78 ,  H01L21/28 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/51 ,  H01L29/66

CPC classification number: H01L29/78391 ,  H01L21/28185 ,  H01L21/823412 ,  H01L21/823418 ,  H01L21/823437 ,  H01L27/088 ,  H01L29/513 ,  H01L29/516 ,  H01L29/517 ,  H01L29/6684

Abstract: An integrated circuit includes transistors respectively including channel layers in a substrate, source electrodes and drain electrodes respectively contacting both sides of the channel layers, gate electrodes on the channel layers, and ferroelectrics layers between the channel layers and the gate electrodes. Electrical characteristics of the ferroelectrics layers of at least two of the transistors are different. Accordingly, threshold voltages of the transistors are different from each other.

公开(公告)号：US20240088256A1

公开(公告)日：2024-03-14

申请号：US18513042

申请日：2023-11-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jinseong HEO ,  Yunseong LEE ,  Taehwan MOON ,  Sanghyun JO

IPC: H01L29/51 ,  H01L21/28

CPC classification number: H01L29/516 ,  H01L21/28158 ,  H01L29/40111

Abstract: An electronic device includes a seed layer including a two-dimensional (2D) material, and a ferroelectric layer on the seed layer. The ferroelectric layer is configured to be aligned in a direction in which a (111) crystal direction is perpendicular to a top surface of a substrate on which the seed layer is located and/or a top surface of the seed layer.

公开(公告)号：US20240038890A1

公开(公告)日：2024-02-01

申请号：US18486493

申请日：2023-10-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jinseong HEO ,  Sangwook KIM ,  Yunseong LEE ,  Sanghyun JO

IPC: H01L29/78 ,  H01L21/28 ,  G11C11/22 ,  H01L29/66

CPC classification number: H01L29/78391 ,  H01L29/40111 ,  G11C11/223 ,  H01L29/6684

Abstract: A domain switching device includes a channel region, a source region and a drain region connected to the channel region, a gate electrode isolated from contact with the channel region, an anti-ferroelectric layer between the channel region and the gate electrode, a conductive layer between the gate electrode and the anti-ferroelectric layer to contact the anti-ferroelectric layer, and a barrier layer between the anti-ferroelectric layer and the channel region.

公开(公告)号：US20230268439A1

公开(公告)日：2023-08-24

申请号：US18310022

申请日：2023-05-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yunseong LEE ,  Jinseong HEO ,  Sangwook KIM ,  Sanghyun JO

IPC: H01L29/78 ,  H01L29/51 ,  H01L29/423 ,  H01L21/02 ,  H01L29/66 ,  H01L29/08 ,  H01L21/28

CPC classification number: H01L29/78391 ,  H01L29/513 ,  H01L29/516 ,  H01L29/517 ,  H01L29/42364 ,  H01L21/0228 ,  H01L21/022 ,  H01L29/6684 ,  H01L29/0847 ,  H01L29/40111 ,  H01L21/02175 ,  H01L21/02181 ,  H01L21/02189 ,  H10B51/30

Abstract: An electronic device includes a ferroelectric layer arranged on a channel region and a gate electrode arranged on the ferroelectric layer. The ferroelectric layer includes a plurality of first oxide monolayers and a second oxide monolayers that is arranged between the substrate and the gate electrode and include a material different from a material of the first oxide monolayers. The first oxide monolayers include oxide monolayers that are alternately formed and include materials different from one another.

公开(公告)号：US20220393016A1

公开(公告)日：2022-12-08

申请号：US17518015

申请日：2021-11-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dukhyun CHOE ,  Jinseong HEO ,  Taehwan MOON ,  Sanghyun JO

IPC: H01L29/51 ,  H01L29/78 ,  H01L29/786 ,  H01L29/423

Abstract: Provided are a thin film structure, a semiconductor device including the thin film structure, and a semiconductor apparatus including the semiconductor device. The thin film structure includes a substrate, and a ferroelectric layer on the substrate. The ferroelectric layer includes a compound having fluorite structure, in which a crystal direction is aligned in a normal direction of a substrate, and having an orthorhombic phase and including fluorine. The ferroelectric layer may have ferroelectricity.

公开(公告)号：US20220241884A1

公开(公告)日：2022-08-04

申请号：US17722746

申请日：2022-04-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jinseong HEO ,  Yunseong LEE ,  Sanghyun JO

IPC: B23K3/08 ,  B23K3/06 ,  H01L23/00 ,  H01L27/11585 ,  H01L29/66

Abstract: Provided are a logic switching device and a method of manufacturing the same. The logic switching device may include a domain switching layer adjacent to a gate electrode. The domain switching layer may include a ferroelectric material region and an anti-ferroelectric material region. The domain switching layer may be a non-memory element. The logic switching device may include a channel, a source and a drain both connected to the channel, the gate electrode arranged to face the channel, and the domain switching layer provided between the channel and the gate electrode.

公开(公告)号：US20220140147A1

公开(公告)日：2022-05-05

申请号：US17459529

申请日：2021-08-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dukhyun CHOE ,  Hyangsook LEE ,  Junghwa KIM ,  Eunha LEE ,  Sanghyun JO ,  Jinseong HEO

IPC: H01L29/78 ,  H01L29/04 ,  H01L29/51 ,  H01L29/66 ,  H01L29/786

Abstract: A thin film structure includes a substrate; and a material layer having a fluorite structure, the material layer on the substrate and comprising crystals of which crystal orientation is aligned in a normal direction of the substrate. The material layer may have ferroelectricity. The material layer may include the crystals of which the crystal orientation is aligned in the normal direction of the substrate among all crystals of the material layer in a dominant ratio.