公开(公告)号：US20170041517A1

公开(公告)日：2017-02-09

申请号：US15220486

申请日：2016-07-27

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Takayuki IKEDA

IPC: H04N5/225 ,  H01L29/786 ,  H01L27/146

CPC classification number: H04N5/2253 ,  H01L27/1225 ,  H01L27/14607 ,  H01L27/14609 ,  H01L27/14616 ,  H01L27/14634 ,  H01L27/14636 ,  H01L27/14692 ,  H01L27/14696 ,  H01L29/78648 ,  H01L29/7869 ,  H01L2224/48091 ,  H04N5/369 ,  H04N5/374 ,  H01L2924/00014

Abstract: An imaging device with low power consumption is provided. A pixel circuit has a configuration of detecting difference data between data of a reference frame and data of a target frame in a pixel, and a peripheral circuit has a configuration of efficiently converting the difference data by A/D conversion so as to obtain high compressibility. Difference data which is encoded by compression is written into a memory element and read sequentially. At this time, the frequency of a clock signal can be lowered in accordance with the amount of data. The read data is expanded and the expanded data is added to the reference frame to constitute an image.

Abstract translation: 提供低功耗的成像装置。 像素电路具有检测像素中的参考帧的数据和目标帧的数据之间的差异数据的结构，并且外围电路具有通过A / D转换有效地转换差分数据以便获得高的压缩性 。 通过压缩编码的差分数据被写入到存储元件中并顺序读取。 此时，可以根据数据量降低时钟信号的频率。 读取的数据被扩展并且扩展的数据被添加到参考帧以构成图像。

公开(公告)号：US20160293649A1

公开(公告)日：2016-10-06

申请号：US15177460

申请日：2016-06-09

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yoshiyuki KUROKAWA ,  Takayuki IKEDA ,  Hikaru TAMURA ,  Munehiro KOZUMA ,  Masataka IKEDA ,  Takeshi AOKI

IPC: H01L27/146 ,  H04N5/361 ,  H04N5/374 ,  H04N5/378 ,  H01L29/786 ,  H01L31/105

CPC classification number: H01L27/14616 ,  H01L27/14603 ,  H01L27/14632 ,  H01L27/14636 ,  H01L27/14643 ,  H01L29/7869 ,  H01L31/1055 ,  H04N5/361 ,  H04N5/374 ,  H04N5/378

Abstract: In a CMOS image sensor in which a plurality of pixels is arranged in a matrix, a transistor in which a channel formation region includes an oxide semiconductor is used for each of a charge accumulation control transistor and a reset transistor which are in a pixel portion. After a reset operation of the signal charge accumulation portion is performed in all the pixels arranged in the matrix, a charge accumulation operation by the photodiode is performed in all the pixels, and a read operation of a signal from the pixel is performed per row. Accordingly, an image can be taken without a distortion.

公开(公告)号：US20160261272A1

公开(公告)日：2016-09-08

申请号：US15050699

申请日：2016-02-23

Applicant: Semiconductor Energy Laboratory Co., LTD.

Inventor： Takayuki IKEDA ,  Munehiro KOZUMA ,  Takeshi AOKI

IPC: H03K19/177 ,  H03K19/00

CPC classification number: H03K19/17724 ,  H03K19/0008 ,  H03K19/1774 ,  H03K19/1776 ,  H03K19/17776

Abstract: A novel electronic device including a reconfigurable circuit is provided. In the electronic device including a reconfigurable circuit capable of executing multi-context operation, a context selection signal is locally generated. For example, a context selection signal is generated in the reconfigurable circuit with the use of context determination data contained in an output of another logic block, for example. The range of application of the context selection signal can be set as appropriate by a user. Thus, multi-context operation performed locally and partly enables efficient use of the circuit. Memory usage can be reduced and its efficiency can be improved compared to the case of using global multi-context driving. Other embodiments may be disclosed and claimed.

Abstract translation: 提供了一种包括可重构电路的新型电子设备。 在包括能够执行多上下文操作的可重构电路的电子设备中，本地生成上下文选择信号。 例如，例如，通过使用包含在另一逻辑块的输出中的上下文确定数据，在可重构电路中生成上下文选择信号。 上下文选择信号的应用范围可以由用户适当地设定。 因此，本地执行的多上下文操作部分地实现了电路的有效使用。 与使用全球多上下文驱动的情况相比，可以降低内存使用并提高其效率。 可以公开和要求保护其他实施例。

公开(公告)号：US20160021314A1

公开(公告)日：2016-01-21

申请号：US14801242

申请日：2015-07-16

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Yoshiyuki KUROKAWA ,  Takayuki IKEDA

IPC: H04N5/232 ,  G09G3/36 ,  G09G3/32 ,  H04N5/378

CPC classification number: H04N5/23293 ,  G09G3/3233 ,  G09G3/3648 ,  G09G2320/103 ,  G09G2330/021 ,  H04N5/23241 ,  H04N5/23245 ,  H04N5/3696 ,  H04N5/37452 ,  H04N5/37457 ,  H04N5/378

Abstract: To provide a display system which enables power consumption to be reduced. An imaging device operates in first and second imaging modes. In the first imaging mode, a digital processing circuit converts a third imaging data captured by a first pixel into a digital data and supplied the data to a display device. In the second imaging mode, an analog processing circuit detects a difference data between first and second imaging data and sets a determination signal to an active value in accordance with the difference data. A display device operates in first and second display modes. In the first display mode, an image data is updated to display an image. In the second display mode, an image is displayed without an update of an image data. The switching of the imaging mode and the display mode is performed by setting the determination signal to an active value.

Abstract translation: 提供能够降低能耗的显示系统。 成像装置在第一和第二成像模式下操作。 在第一成像模式中，数字处理电路将由第一像素捕获的第三成像数据转换为数字数据，并将数据提供给显示装置。 在第二成像模式中，模拟处理电路检测第一和第二成像数据之间的差异数据，并根据差异数据将确定信号设置为有效值。 显示装置在第一和第二显示模式下操作。 在第一显示模式下，更新图像数据以显示图像。 在第二显示模式中，显示图像而不更新图像数据。 通过将确定信号设置为有效值来执行成像模式和显示模式的切换。

公开(公告)号：US20150340392A1

公开(公告)日：2015-11-26

申请号：US14816373

申请日：2015-08-03

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Takayuki IKEDA

IPC: H01L27/146

CPC classification number: H01L27/14605 ,  H01L27/14601 ,  H01L27/14614 ,  H01L27/14636 ,  H01L27/14643 ,  H01L29/22 ,  H01L29/24 ,  H01L29/7869

Abstract: An image sensor is provided which is capable of holding data for one frame period or longer and conducting a difference operation with a small number of elements. A photosensor is provided in each of a plurality of pixels arranged in a matrix, each pixel accumulates electric charge in a data holding portion for one frame period or longer, and an output of the photosensor changes in accordance with the electric charge accumulated in the data holding portion. As a writing switch element for the data holding portion, a transistor with small leakage current (sufficiently smaller than 1×10−14 A) is used. As an example of the transistor with small leakage current, there is a transistor having a channel formed in an oxide semiconductor layer.

Abstract translation: 提供一种图像传感器，其能够保持一帧或更长时间的数据，并且用少量元素进行差分操作。 在矩阵中排列的多个像素的每一个中设置有光传感器，每个像素在数据保持部分中积累电费一帧以上，光传感器的输出根据数据中累积的电荷而变化 保持部。 作为用于数据保持部分的写入开关元件，使用具有小的漏电流（足够小于1×10-14A）的晶体管。 作为漏电流小的晶体管的例子，存在在氧化物半导体层中形成沟道的晶体管。

公开(公告)号：US20140312932A1

公开(公告)日：2014-10-23

申请号：US14251993

申请日：2014-04-14

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Takayuki IKEDA

IPC: H03K19/00

CPC classification number: H03K19/0013 ,  G11C11/403 ,  H03K19/1776

Abstract: A low-power storage device is provided. The storage device includes a first transistor, a second transistor, a logic element, and a semiconductor element. The second transistor controls supply of a first signal to a gate of the first transistor. When the potential of a second signal to be input is changed from a first potential into a second potential lower than the first potential, the logic element changes the potential of a first terminal of the first transistor from a third potential lower than the second potential into the first potential after the logic element changes the potential of the first terminal of the first transistor from the second potential into the third potential. The semiconductor element has a function of making a second terminal of the first transistor floating. The first transistor includes a channel formation region in an oxide semiconductor film.

Abstract translation: 提供了一种低功率存储设备。 存储装置包括第一晶体管，第二晶体管，逻辑元件和半导体元件。 第二晶体管控制向第一晶体管的栅极提供第一信号。 当要输入的第二信号的电位从第一电位变为低于第一电位的第二电位时，逻辑元件将第一晶体管的第一端子的电位从低于第二电位的第三电位变为 逻辑元件将第一晶体管的第一端子的电位从第二电位变为第三电位后的第一电势。 半导体元件具有使第一晶体管的第二端子浮置的功能。 第一晶体管包括氧化物半导体膜中的沟道形成区。

公开(公告)号：US20140240294A1

公开(公告)日：2014-08-28

申请号：US14272735

申请日：2014-05-08

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yoshiyuki KUROKAWA ,  Takayuki IKEDA ,  Hikaru TAMURA ,  Munehiro KOZUMA ,  Masataka IKEDA

IPC: G06F3/042 ,  H01L27/144 ,  H01L27/146 ,  H01L31/0232

CPC classification number: G06F3/0421 ,  G06F3/0428 ,  H01L27/144 ,  H01L27/14625 ,  H01L31/0232 ,  H01L31/02327

Abstract: Influence of external light is suppressed. With a photodetector including a photodetector circuit which generates a data signal in accordance with illuminance of incident light and a light unit which overlaps with the photodetector circuit, a first data signal is generated by the photodetector circuit when the light unit is in an ON state, a second data signal is formed by the photodetector circuit when the light unit is in an OFF state, and the first data signal and the second data signal are compared, so that a difference data signal that is data of a difference between the two compared data signals is generated.

Abstract translation: 外部光的影响被抑制。 利用包括根据入射光的照度产生数据信号的光电检测器电路和与光电检测器电路重叠的光单元的光检测器，当光单元处于导通状态时，由光检测器电路产生第一数据信号， 当光单元处于关闭状态时，第二数据信号由光检测器电路形成，并且比较第一数据信号和第二数据信号，使得作为两个比较数据之间的差的数据的差分数据信号 生成信号。

公开(公告)号：US20140056405A1

公开(公告)日：2014-02-27

申请号：US13959778

申请日：2013-08-06

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yoshiyuki KUROKAWA ,  Takayuki IKEDA

IPC: A61B6/00

CPC classification number: A61B6/4208 ,  G01T1/2018

Abstract: To achieve a radiation detection panel capable of outputting a signal for generating an accurate pixel signal regardless of the performance of a conversion unit, a detection circuit that outputs a signal used for generating a pixel signal includes a first output circuit that outputs a signal due to afterglow, and a second output circuit that outputs a signal including both a signal based on radiation emission and a signal due to afterglow. Transistors using an oxide semiconductor material for a channel formation region are used as some transistors included in the first and second output circuits. In the radiation detection panel having this structure, the signal (a first signal or a second signal) can be held in each output circuit; therefore, after all output circuits hold the signal (the first signal or the second signal), the first signal and the second signal can be sequentially output from detection circuits.

Abstract translation: 为了实现能够输出用于产生精确像素信号的信号而不管转换单元的性能的辐射检测面板，输出用于产生像素信号的信号的检测电路包括：第一输出电路，其输出由于 以及输出包括基于辐射发射的信号和由余辉引起的信号的信号的第二输出电路。 使用使用氧化物半导体材料作为沟道形成区域的晶体管被​​用作包括在第一和第二输出电路中的一些晶体管。 在具有这种结构的放射线检测面板中，可以将信号（第一信号或第二信号）保持在每个输出电路中; 因此，在所有输出电路保持信号（第一信号或第二信号）之后，可以从检测电路顺序地输出第一信号和第二信号。

公开(公告)号：US20250053798A1

公开(公告)日：2025-02-13

申请号：US18929948

申请日：2024-10-29

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Takayuki IKEDA ,  Takahiro FUKUTOME

IPC: G06N3/067 ,  G06N3/04 ,  G06N3/065 ,  H01L27/12 ,  H01L27/146 ,  H01L29/786 ,  H04N23/57 ,  H04N25/75 ,  H04N25/77

Abstract: An imaging device connected to a neural network is provided. An imaging device having a neuron in a neural network includes a plurality of first pixels, a first circuit, a second circuit, and a third circuit. Each of the plurality of first pixels includes a photoelectric conversion element. The plurality of first pixels is electrically connected to the first circuit. The first circuit is electrically connected to the second circuit. The second circuit is electrically connected to the third circuit. Each of the plurality of first pixels generates an input signal of the neuron. The first circuit, the second circuit, and the third circuit function as the neuron. The third circuit includes an interface connected to the neural network.

公开(公告)号：US20250014616A1

公开(公告)日：2025-01-09

申请号：US18894175

申请日：2024-09-24

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Takeya HIROSE ,  Seiichi YONEDA ,  Takayuki IKEDA ,  Shunpei YAMAZAKI

IPC: G11C7/16 ,  G11C11/40 ,  G11C11/54 ,  G11C27/02 ,  H01L29/786

Abstract: A semiconductor device capable of holding analog data is provided. Two holding circuits, two bootstrap circuits, and one source follower circuit are formed with use of four transistors and two capacitors. A memory node is provided in each of the two holding circuits; a data potential is written to one of the memory nodes and a reference potential is written to the other of the memory nodes. At the time of data reading, the potential of the one memory node is increased in one of the bootstrap circuits, and the potential of the other memory node is increased in the other of the bootstrap circuits. A potential difference between the two memory nodes is output by the source follower circuit. With use of the source follower circuit, the output impedance can be reduced.