公开(公告)号：US20250168527A1

公开(公告)日：2025-05-22

申请号：US19029199

申请日：2025-01-17

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Takeya HIROSE ,  Seiichi YONEDA ,  Hiroki INOUE ,  Takayuki IKEDA ,  Shunpei YAMAZAKI

IPC: H04N25/705 ,  H04N25/77 ,  H04N25/78

Abstract: An imaging device having a function of processing an image is provided. The imaging device has an additional function such as image processing, can hold analog data obtained by an image capturing operation in a pixel, and can extract data obtained by multiplying the analog data by a predetermined weight coefficient. Difference data between adjacent light-receiving devices can be obtained in a pixel, and data on luminance gradient can be obtained. When the data is taken in a neural network or the like, inference of distance data or the like can be performed. Since enormous volume of image data in the state of analog data can be held in pixels, processing can be performed efficiently.

公开(公告)号：US20250159384A1

公开(公告)日：2025-05-15

申请号：US19021412

申请日：2025-01-15

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Seiichi YONEDA ,  Yusuke NEGORO ,  Takeya HIROSE ,  Shunsuke SATO ,  Shunpei YAMAZAKI

IPC: H04N25/78 ,  H04N25/771 ,  H04N25/79 ,  H10K39/32

Abstract: An imaging device that has an image processing function and is capable of a high-speed operation is provided. The imaging device has an additional function such as image processing, and can retain analog data obtained by an image capturing operation in pixels and extract data obtained by multiplying the analog data by a given weight coefficient. In the imaging device, the data is stored in a memory cell and pooling processing of data stored in a plurality of memory cells can be performed. The pixels are provided so as to have a region overlapping with at least one of the memory cells, a pooling processing circuit, and a reading circuit of the pixels; thus, an increase in the area of the imaging device can be inhibited even with an additional function.

公开(公告)号：US20240211556A1

公开(公告)日：2024-06-27

申请号：US18544191

申请日：2023-12-18

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Seiichi YONEDA ,  Yusuke NEGORO

IPC: G06F21/31 ,  G06F16/22 ,  G06V10/143 ,  G06V40/12 ,  G06V40/13 ,  G06V40/14 ,  H01L25/16 ,  H01L27/146 ,  H01L27/15 ,  H01L29/786 ,  H01L31/12

CPC classification number: G06F21/31 ,  G06F16/22 ,  G06V10/143 ,  G06V40/1318 ,  G06V40/14 ,  H01L25/167 ,  G06V40/1347 ,  G06V40/1365 ,  H01L27/14616 ,  H01L27/15 ,  H01L29/7869 ,  H01L31/12

Abstract: A novel authentication system is provided. In addition, a method for recording an unlocking history is provided. The authentication system includes an arithmetic device and an input/output device. The arithmetic device supplies first control data and second control data, and is supplied with a sensor signal. The input/output device includes an electric lock and a reading portion, and the electric lock is unlocked on the basis of the second control data. The reading portion is supplied with the first control data, supplies the sensor signal, and includes a light-emitting element and a pixel array. The light-emitting element emits light including infrared rays, the pixel array includes pixels, the pixels each include an imaging circuit and a photoelectric conversion element, the imaging circuit is electrically connected to the photoelectric conversion element, the imaging circuit includes a transistor, and the transistor includes an oxide semiconductor film.

公开(公告)号：US20240196117A1

公开(公告)日：2024-06-13

申请号：US18584020

申请日：2024-02-22

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Seiichi YONEDA ,  Hiroki INOUE

IPC: H04N25/78 ,  H04N25/709 ,  H04N25/77 ,  H10K39/32

CPC classification number: H04N25/78 ,  H04N25/709 ,  H04N25/77 ,  H10K39/32

Abstract: An imaging device with low power consumption is provided. A pixel includes a first circuit and a second circuit. The first circuit can generate imaging data and retain difference data that is a difference between the imaging data and data obtained in an initial frame. The second circuit includes a circuit that compares the difference data and a voltage range set arbitrarily. The second circuit supplies a reading signal based on the comparison result. With the use of the structure, reading from the pixel is not performed when it is determined that the difference data is within the set voltage range and reading from the pixel can be performed when it is determined that the difference data is outside the voltage range.

公开(公告)号：US20230133706A1

公开(公告)日：2023-05-04

申请号：US17912560

申请日：2021-04-19

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yusuke NEGORO ,  Seiichi YONEDA ,  Shunpei YAMAZAKI

IPC: H01L29/786 ,  H04N25/40

Abstract: An imaging device having an image processing function is provided. The imaging device includes a plurality of pixels. The pixel has a function of generating first data of an n-th frame by supplying a first weight to image data obtained in the n-th frame (n is an integer greater than or equal to 2). The pixel has a function of generating first data of an n−1-th frame by supplying a second weight to image data obtained in the n−1-th frame. The pixel has a function of generating second data by adding the first data of the n−1-th frame and the first data of the n-th frame.

公开(公告)号：US20220416767A1

公开(公告)日：2022-12-29

申请号：US17779675

申请日：2020-11-16

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hiroki INOUE ,  Seiichi YONEDA ,  Yusuke NEGORO

IPC: H03K3/011 ,  H01L27/146 ,  H03K17/56

Abstract: A semiconductor device with a small circuit scale is provided. The semiconductor device includes a first circuit and a second circuit. The first circuit includes first to n-th (n is an integer of 2 or more) transistors and the second circuit includes (n+1)-th to 2n-th transistors. The first to n-th transistors are connected in parallel to each other and the (n+1)-th to 2n-th transistors are connected in series to each other. First to n-th signals are supplied to the first circuit and the second circuit. The first circuit has a function of outputting a first potential when each of potentials of the first to n-th signals is lower than or equal to a first reference potential, and outputting a second potential when at least one of the potentials of the first to n-th signals is higher than the first reference potential. The second circuit has a function of outputting a third potential when each of the potentials of the first to n-th signals is higher than a second reference potential, and outputting the first potential when at least one of the potentials of the first to n-th signals is lower than or equal to the second reference potential.

公开(公告)号：US20220415941A1

公开(公告)日：2022-12-29

申请号：US17781152

申请日：2020-12-14

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Seiichi YONEDA ,  Toshiki HAMADA ,  Yuki OKAMOTO ,  Shunpei YAMAZAKI

IPC: H01L27/146 ,  H04N5/378 ,  H04N5/3745

Abstract: An imaging device with an arithmetic function in which the circuit size is reduced is provided. The imaging device includes a plurality of pixel blocks. Each of the pixel blocks includes N (N is an integer greater than or equal to 1) first circuits, N second circuits, and a third circuit. Each of the first circuits includes a photoelectric conversion device, and the photoelectric conversion device has a function of converting incident light into an electrical signal and has a function of outputting a first signal that is obtained by binarizing the electrical signal to the second circuit. Each of the second circuits has a function of outputting a second signal that is obtained by multiplying the first signal by a weight coefficient to a third circuit. When the N second signals are output to a wiring electrically connected to the third circuit, addition is performed. The first circuit includes a transistor, and an OS transistor is preferably used as the transistor.

公开(公告)号：US20220320172A1

公开(公告)日：2022-10-06

申请号：US17621335

申请日：2020-06-22

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yusuke NEGORO ,  Seiichi YONEDA

IPC: H01L27/146

Abstract: The present invention relates to a highly functional imaging device that can be manufactured through a small number of steps. A first stacked body is formed in which a circuit provided with a transistor including a metal oxide in its channel formation region (hereinafter, OS transistor) is stacked over a circuit including a Si transistor. A second stacked body is formed in which an OS transistor is provided over a Si photodiode. Layers including the OS transistors of the first stacked body and the second stacked body are bonded to each other to obtain electrical connection between circuits. With such a structure, even when a structure is employed in which a plurality of circuits having different functions are stacked, the number of polishing steps and bonding steps can be reduced, improving the yield.

公开(公告)号：US20210399726A1

公开(公告)日：2021-12-23

申请号：US17275213

申请日：2019-09-17

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Seiichi YONEDA ,  Atsushi MIYAGUCHI ,  Tatsunori INOUE

IPC: H03K17/56 ,  H02J50/20

Abstract: Provided is a semiconductor device with a novel structure in which the power consumption can be reduced. The semiconductor device includes a sensor, a sample-and-hold circuit to which a sensor signal of the sensor is input, an analog-digital converter circuit to which an output signal of the sample-and-hold circuit is input, a control circuit, a battery, and an antenna. The sample-and-hold circuit includes a first selection circuit, a plurality of signal retention circuits, and a second selection circuit, and the control circuit performs a control so that a potential corresponding to the sensor signal is retained in the plurality of signal retention circuits successively by the first selection circuit in a first period during which power is supplied from the battery, and performs a control so that the output signal based on the potential retained in the plurality of signal retention circuits is output by the second selection circuit in a second period during which power is supplied from outside through the antenna.

公开(公告)号：US20210202549A1

公开(公告)日：2021-07-01

申请号：US17057526

申请日：2019-06-11

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Seiichi YONEDA ,  Hidetomo KOBAYASHI ,  Takashi NAKAGAWA ,  Yusuke NEGORO ,  Shunpei YAMAZAKI

IPC: H01L27/146 ,  H04N5/378 ,  H04N5/353 ,  H04N5/369

Abstract: An imaging device that can obtain imaging data corresponding to high-resolution images in a short period of time is provided. The imaging device includes a pixel including a photoelectric conversion element and n (n is an integer more than 2 inclusive) retention circuits. The photoelectric conversion element and the n retention circuits are stacked. One electrode of the photoelectric conversion element is electrically connected to the first to n-th retention circuits. The retention circuits include OS transistors with an extremely low off-state current feature, and can retain imaging data for a long time. In the first to n-th periods, the imaging device obtains the first to n-th imaging data and retains it in the first to n-th retention circuits. Then, the first to n-th imaging data retained in the first to n-th retention circuits are read out. The read imaging data is output outside the imaging data through AD conversion.