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公开(公告)号：US20170271736A1
公开(公告)日：2017-09-21
申请号：US15614969
申请日：2017-06-06
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Robert Floyd Payne , Gerd Schuppener , Juan Alejandro Herbsommer
CPC classification number: H01P3/16 , H01P11/006
Abstract: A digital system has a dielectric core waveguide that is formed within a multilayer substrate. The dielectric waveguide has a longitudinal dielectric core member formed in the core layer having two adjacent longitudinal sides each separated from the core layer by a corresponding slot portion formed in the core layer The dielectric core member has the first dielectric constant value. A cladding surrounds the dielectric core member formed by a top layer and the bottom layer infilling the slot portions of the core layer. The cladding has a dielectric constant value that is lower than the first dielectric constant value.
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32.发明授权Interface between an integrated circuit and a dielectric waveguide using a carrier substrate with a dipole antenna and a reflector 有权使用具有偶极天线和反射器的载体衬底的集成电路和介质波导之间的接口公开(公告)号：US09300025B2
公开(公告)日：2016-03-29
申请号：US13854958
申请日：2013-04-02
Applicant: Texas Instruments Incorporated
Inventor： Juan Alejandro Herbsommer , Gerd Schuppener , Robert Floyd Payne
IPC: H01P5/107 , H01P3/16 , H01P5/08 , G02B6/44 , H01P11/00 , H01P5/00 , H01Q1/50 , H01Q19/10 , H04B1/40 , H01Q19/30 , H01P3/12
CPC classification number: H01P3/16 , G02B6/4416 , H01L2223/6677 , H01L2224/16227 , H01L2224/73204 , H01L2924/15192 , H01L2924/15311 , H01P3/121 , H01P3/165 , H01P5/00 , H01P5/087 , H01P5/107 , H01P5/184 , H01P11/001 , H01P11/002 , H01Q1/50 , H01Q19/108 , H01Q19/30 , H04B1/40 , Y10T29/49016 , Y10T29/49826
Abstract: A system includes an integrated circuit that has a substrate with a top surface and a bottom surface. Semiconductor circuitry is including a radio frequency (RF) amplifier configured to produce an RF signal or an RF receiver configured to receive an RF signal is formed on the top surface of the substrate. A through-substrate via is coupled to an output of the RF amplifier. A metalized antenna formed on the bottom surface of the substrate is coupled to the through-substrate via. The metalized antenna is configured to launch an electromagnet wave representative of the RF signal into a dielectric waveguide (DWG) when the DWG is coupled to the bottom side of the substrate.
Abstract translation: 一种系统包括具有顶表面和底表面的基底的集成电路。 半导体电路包括被配置为产生RF信号的射频（RF）放大器或被配置为接收RF信号的RF接收器，该RF接收器被形成在衬底的顶表面上。 穿通基板通孔耦合到RF放大器的输出端。 形成在基板的底表面上的金属化天线与穿通基板通孔相连。 当DWG耦合到衬底的底侧时，金属化天线被配置为将代表RF信号的电磁波发射到电介质波导（DWG）中。
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33.发明授权Interface between an integrated circuit and a dielectric waveguide using a dipole antenna, a reflector and a plurality of director elements 有权使用偶极子天线，反射器和多个导向器元件的集成电路和电介质波导之间的接口公开(公告)号：US09300024B2
公开(公告)日：2016-03-29
申请号：US13854957
申请日：2013-04-02
Applicant: Texas Instruments Incorporated
Inventor： Gerd Schuppener , Juan Alejandro Herbsommer , Robert Floyd Payne
IPC: H01P5/107 , H01P3/16 , H01P5/08 , G02B6/44 , H01P11/00 , H01P5/00 , H01Q1/50 , H01Q19/10 , H04B1/40 , H01Q19/30 , H01P3/12
CPC classification number: H01P3/16 , G02B6/4416 , H01L2223/6677 , H01L2224/16227 , H01L2224/73204 , H01L2924/15192 , H01L2924/15311 , H01P3/121 , H01P3/165 , H01P5/00 , H01P5/087 , H01P5/107 , H01P5/184 , H01P11/001 , H01P11/002 , H01Q1/50 , H01Q19/108 , H01Q19/30 , H04B1/40 , Y10T29/49016 , Y10T29/49826
Abstract: A system includes an electronic device coupled to a mating end of a dielectric wave guide (DWG). The electronic device has a multilayer substrate that has an interface surface configured for interfacing to the mating end of the DWG. A conductive layer is etched to form a dipole antenna disposed adjacent the interface surface. A reflector structure is formed in the substrate adjacent the dipole antenna opposite from the interface surface. A set of director elements is embedded in the mating end of the DWG. Specific spacing is maintained between the dipole antenna and the set of director elements.
Abstract translation: 一种系统包括耦合到电介质波导（DWG）的配合端的电子装置。 电子设备具有多层基板，该多层基板具有被配置为与DWG的配合端对接的界面。 蚀刻导电层以形成邻近界面表面设置的偶极天线。 反射器结构形成在与界面表面相对的偶极子天线附近的衬底中。 一组指导元素嵌入在DWG的配对端。 在偶极天线和导向器元件组之间保持特定的间隔。
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公开(公告)号：US09112253B2
公开(公告)日：2015-08-18
申请号：US13854956
申请日：2013-04-01
Applicant: Texas Instruments Incorporated
Inventor： Robert Floyd Payne , Juan Alejandro Herbsommer , Gerd Schuppener
IPC: H01P11/00 , H01P3/16 , H01P5/08 , G02B6/44 , H01P5/00 , H01Q1/50 , H01Q19/10 , H04B1/40 , H01Q19/30 , H01P3/12 , H01P5/107
CPC classification number: H01P3/16 , G02B6/4416 , H01L2223/6677 , H01L2224/16227 , H01L2224/73204 , H01L2924/15192 , H01L2924/15311 , H01P3/121 , H01P3/165 , H01P5/00 , H01P5/087 , H01P5/107 , H01P5/184 , H01P11/001 , H01P11/002 , H01Q1/50 , H01Q19/108 , H01Q19/30 , H04B1/40 , Y10T29/49016 , Y10T29/49826
Abstract: A communication cable includes one or more conductive elements surrounded by a dielectric sheath. The sheath member has a first dielectric constant value. A dielectric core member is placed longitudinally adjacent to and in contact with an outer surface of the sheath member. The core member has a second dielectric constant value that is higher than the first dielectric constant value. A cladding surrounds the sheath member and the dielectric core member. The cladding has a third dielectric constant value that is lower than the second dielectric constant value. A dielectric wave guide is formed by the dielectric core member surrounded by the sheath and the cladding.
Abstract translation: 通信电缆包括由电介质护套包围的一个或多个导电元件。 护套构件具有第一介电常数值。 电介质芯构件被纵向地邻近鞘构件的外表面并与其接触。 芯构件具有比第一介电常数值高的第二介电常数值。 包层围绕护套构件和电介质芯构件。 包层具有低于第二介电常数值的第三介电常数值。 电介质波导由被护套和包层包围的介质芯构件形成。
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公开(公告)号：US20140287703A1
公开(公告)日：2014-09-25
申请号：US13854958
申请日：2013-04-02
Applicant: Texas Instruments Incorporated
Inventor： Juan Alejandro Herbsommer , Gerd Schuppener , Robert Floyd Payne
CPC classification number: H01P3/16 , G02B6/4416 , H01L2223/6677 , H01L2224/16227 , H01L2224/73204 , H01L2924/15192 , H01L2924/15311 , H01P3/121 , H01P3/165 , H01P5/00 , H01P5/087 , H01P5/107 , H01P5/184 , H01P11/001 , H01P11/002 , H01Q1/50 , H01Q19/108 , H01Q19/30 , H04B1/40 , Y10T29/49016 , Y10T29/49826
Abstract: A system includes an integrated circuit that has a substrate with a top surface and a bottom surface. Semiconductor circuitry is including a radio frequency (RF) amplifier configured to produce an RF signal or an RF receiver configured to receive an RF signal is formed on the top surface of the substrate. A through-substrate via is coupled to an output of the RF amplifier. A metalized antenna formed on the bottom surface of the substrate is coupled to the through-substrate via. The metalized antenna is configured to launch an electromagnet wave representative of the RF signal into a dielectric waveguide (DWG) when the DWG is coupled to the bottom side of the substrate.
Abstract translation: 一种系统包括具有顶表面和底表面的基底的集成电路。 半导体电路包括被配置为产生RF信号的射频（RF）放大器或被配置为接收RF信号的RF接收器，该RF接收器被形成在衬底的顶表面上。 穿通基板通孔耦合到RF放大器的输出端。 形成在基板的底表面上的金属化天线与穿通基板通孔相连。 当DWG耦合到衬底的底侧时，金属化天线被配置为将代表RF信号的电磁波发射到电介质波导（DWG）中。
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Patent Agency Ranking
公开(公告)号：US20140285292A1
公开(公告)日：2014-09-25
申请号：US13854951
申请日：2013-04-01
Applicant: Texas Instruments Incorporated
Inventor： Juan Alejandro Herbsommer , Gerd Schuppener , Robert Floyd Payne
CPC classification number: H01P3/16 , G02B6/4416 , H01L2223/6677 , H01L2224/16227 , H01L2224/73204 , H01L2924/15192 , H01L2924/15311 , H01P3/121 , H01P3/165 , H01P5/00 , H01P5/087 , H01P5/107 , H01P5/184 , H01P11/001 , H01P11/002 , H01Q1/50 , H01Q19/108 , H01Q19/30 , H04B1/40 , Y10T29/49016 , Y10T29/49826
Abstract: A dielectric wave guide (DWG) has a longitudinal dielectric core member. The core member has a first dielectric constant value. A cladding surrounds the dielectric core member and has a second dielectric constant value that is lower than the first dielectric constant. A portion of the DWG is configured as a corner having a radius. A conductive layer formed on an outer radius of the corner.
Abstract translation: 电介质波导（DWG）具有纵向介质芯构件。 芯构件具有第一介电常数值。 包层围绕介质芯构件并具有低于第一介电常数的第二介电常数值。 DWG的一部分被配置为具有半径的角。 形成在拐角的外半径上的导电层。
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公开(公告)号：US20140240062A1
公开(公告)日：2014-08-28
申请号：US13854948
申请日：2013-04-01
Applicant: Texas Instruments Incorporated
Inventor： Juan Alejandro Herbsommer , Gerd Schuppener , Robert Floyd Payne
IPC: H01P3/16
CPC classification number: H01P3/16 , H01L2223/6677 , H01L2224/16227 , H01L2924/15311 , H01P1/04 , H01P3/121 , H01Q13/00 , H05K1/0239 , H05K1/024 , H05K2201/0187 , H05K2201/0195 , H05K2201/09618 , H05K2201/10098 , Y10T29/49826 , Y10T29/49908
Abstract: A dielectric wave guide (DWG) has a dielectric core member that has a first dielectric constant value. A cladding surrounding the dielectric core member has a second dielectric constant value that is lower than the first dielectric constant. A mating end of the DWG is configured for mating with a second DWG having a matching non-planar shaped mating end. A deformable material is disposed on the surface of the mating end of the DWG, such that when mated to a second DWG, the deformable material fills a gap region between the mating ends of the DWG and the second DWG
Abstract translation: 电介质波导（DWG）具有第一介电常数值的介质芯构件。 围绕介电芯构件的包层具有低于第一介电常数的第二介电常数值。 DWG的配合端配置成与具有匹配的非平面形状配合端的第二DWG配合。 可变形材料设置在DWG的配合端的表面上，使得当与第二DWG配合时，可变形材料填充DWG的配合端和第二DWG之间的间隙区域
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38.发明授权公开(公告)号：US11552200B2
公开(公告)日：2023-01-10
申请号：US17347822
申请日：2021-06-15
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Gerd Schuppener , Miaad Aliroteh , Srinath Ramaswamy , Baher Haroun
IPC: H04B10/69 , H01L31/02 , H01L31/107 , H03F3/08
Abstract: An avalanche photo-diode (APD) circuit includes a first APD and a bias circuit. The first APD is configured to detect light. The bias circuit is configured to control a gain of the first APD. The bias circuit includes a second APD, a reference voltage source, a bias voltage generation circuit, and a metal layer configured to shield the second APD from the light. The reference voltage source is configured to bias the second APD. The bias voltage generation circuit is configured to generate a bias voltage for biasing the first APD based on dark current output by the second APD.
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公开(公告)号：US20210376838A1
公开(公告)日：2021-12-02
申请号：US17397954
申请日：2021-08-09
Applicant: Texas Instruments Incorporated
Inventor： Salvatore Luciano Finocchiaro , Tolga Dinc , Gerd Schuppener , Siraj Akhtar , Swaminathan Sankaran , Baher Haroun
Abstract: In described examples, a method of operating a charge pump includes a first control signal deactivating a first transistor, and the first control signal's logical complement activating a second transistor to reset the first transistor's DC bias voltage. The first control signal's logical complement deactivates the second transistor, and the first control signal provides a bias voltage to the first transistor to activate it, causing current to be transmitted from an input voltage to an output terminal. A second control signal deactivates a third transistor, and the second control signal's logical complement activates a fourth transistor to reset the second transistor's DC bias voltage. The second control signal's logical complement deactivates the fourth transistor, and the second control signal provides a bias voltage to the third transistor to activate it, causing current to be transmitted from the output terminal to a ground.
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公开(公告)号：US20210151847A1
公开(公告)日：2021-05-20
申请号：US17140858
申请日：2021-01-04
Applicant: Texas Instruments Incorporated
Inventor： Baher Haroun , Juan Alejandro Herbsommer , Gerd Schuppener , Swaminathan Sankaran
Abstract: An interposer acts as a buffer zone between a transceiver IC and a dielectric waveguide interconnect and establishes two well-defined reference planes that can be optimized independently. The interposer includes a block of material having: a first interface region to interface with an antenna coupled to an integrated circuit (IC); and a second interface region to interface to the dielectric waveguide. An interface waveguide is formed by a defined region positioned within the block of material between the first interface region and the second interface region.
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