公开(公告)号：US20240371952A1

公开(公告)日：2024-11-07

申请号：US18770393

申请日：2024-07-11

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chia-Hung CHU ,  Tsungyu Hung ,  Hsu-Kai Chang ,  Ding-Kang Shih ,  Keng-Chu Lin ,  Pang-Yen Tsai ,  Sung-Li Wang ,  Shuen-Shin Liang

IPC: H01L29/417 ,  H01L21/285 ,  H01L29/40 ,  H01L29/423

Abstract: The present disclosure describes a method to form a semiconductor device with backside contact structures. The method includes forming a semiconductor device on a first side of a substrate. The semiconductor device includes a source/drain (S/D) region. The method further includes etching a portion of the S/D region on a second side of the substrate to form an opening and forming an epitaxial contact structure on the S/D region in the opening. The second side is opposite to the first side. The epitaxial contact structure includes a first portion in contact with the S/D region in the opening and a second portion on the first portion. A width of the second portion is larger than the first portion.

公开(公告)号：US12094952B2

公开(公告)日：2024-09-17

申请号：US18297831

申请日：2023-04-10

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ting-Ting Chen ,  Chen-Han Wang ,  Keng-Chu Lin ,  Shuen-Shin Liang ,  Tsu-Hsiu Perng ,  Tsai-Jung Ho ,  Tsung-Han Ko ,  Tetsuji Ueno ,  Yahru Cheng

IPC: H01L29/49 ,  H01L29/06 ,  H01L29/66

CPC classification number: H01L29/4991 ,  H01L29/0653 ,  H01L29/6656

Abstract: The present disclosure describes a method of forming an intermediate spacer structure between a gate structure and a source/drain (S/D) contact structure and removing a top portion of the intermediate spacer structure to form a recess. The intermediate spacer structure includes a first spacer layer, a second spacer layer, and a sacrificial spacer layer between the first spacer layer and the second spacer layer. The method further includes removing the sacrificial spacer layer to form an air gap between the first spacer layer and the second spacer layer and spinning a dielectric layer on the air gap, the first spacer layer, and the second spacer layer to fill in the recess and seal the air gap. The dielectric layer includes raw materials for a spin-on dielectric material.

公开(公告)号：US11942358B2

公开(公告)日：2024-03-26

申请号：US17200223

申请日：2021-03-12

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Mrunal Abhijith Khaderbad ,  Ko-Feng Chen ,  Zheng-Yong Liang ,  Chen-Han Wang ,  De-Yang Chiou ,  Yu-Yun Peng ,  Keng-Chu Lin

IPC: H01L21/762 ,  H01L21/311 ,  H01L21/8234

CPC classification number: H01L21/76224 ,  H01L21/31116 ,  H01L21/823481

Abstract: The present disclosure describes a method of forming low thermal budget dielectrics in semiconductor devices. The method includes forming, on a substrate, first and second fin structures with an opening in between, filling the opening with a flowable isolation material, treating the flowable isolation material with a plasma, and removing a portion of the plasma-treated flowable isolation material between the first and second fin structures.

公开(公告)号：US11894437B2

公开(公告)日：2024-02-06

申请号：US17320553

申请日：2021-05-14

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shuen-Shin Liang ,  Chih-Chien Chi ,  Chien-Shun Liao ,  Keng-Chu Lin ,  Kai-Ting Huang ,  Sung-Li Wang ,  Yi-Ying Liu ,  Chia-Hung Chu ,  Hsu-Kai Chang ,  Cheng-Wei Chang

IPC: H01L29/45 ,  H01L23/535 ,  H01L23/532 ,  H01L29/78 ,  H01L21/768

CPC classification number: H01L29/45 ,  H01L21/7684 ,  H01L21/76805 ,  H01L21/76843 ,  H01L21/76882 ,  H01L21/76895 ,  H01L23/535 ,  H01L23/53209 ,  H01L29/7851

Abstract: The present disclosure describes a method for forming metallization layers that include a ruthenium metal liner and a cobalt metal fill. The method includes depositing a first dielectric on a substrate having a gate structure and source/drain (S/D) structures, forming an opening in the first dielectric to expose the S/D structures, and depositing a ruthenium metal on bottom and sidewall surfaces of the opening. The method further includes depositing a cobalt metal on the ruthenium metal to fill the opening, reflowing the cobalt metal, and planarizing the cobalt and ruthenium metals to form S/D conductive structures with a top surface coplanar with a top surface of the first dielectric.

公开(公告)号：US11855214B2

公开(公告)日：2023-12-26

申请号：US17201673

申请日：2021-03-15

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Yun Peng ,  Fu-Ting Yen ,  Ting-Ting Chen ,  Keng-Chu Lin ,  Tsu-Hsiu Perng

IPC: H01L29/78 ,  H01L21/02 ,  H01L29/66 ,  H01L21/8234 ,  H01L29/423 ,  H01L29/06

CPC classification number: H01L29/785 ,  H01L21/0217 ,  H01L21/02203 ,  H01L29/6656 ,  H01L29/66545 ,  H01L29/66553 ,  H01L29/66795 ,  H01L21/823468 ,  H01L29/0665 ,  H01L29/42392

Abstract: Semiconductor devices and methods of forming the same are provided. A semiconductor device according to the present disclosure includes a first semiconductor channel member and a second semiconductor channel member over the first semiconductor channel member and a porous dielectric feature that includes silicon and nitrogen. In the semiconductor device, the porous dielectric feature is sandwiched between the first and second semiconductor channel members and a density of the porous dielectric feature is smaller than a density of silicon nitride.

公开(公告)号：US11798985B2

公开(公告)日：2023-10-24

申请号：US17097959

申请日：2020-11-13

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Mrunal Abhijith Khaderbad ,  Dhanyakumar Mahaveer Sathaiya ,  Huicheng Chang ,  Ko-Feng Chen ,  Keng-Chu Lin

IPC: H01L29/06 ,  H01L27/092 ,  H01L21/8238 ,  H01L29/78 ,  H01L29/66 ,  H01L21/02 ,  H01L27/06 ,  H01L29/423 ,  H01L29/786 ,  H01L21/822

CPC classification number: H01L29/0653 ,  H01L21/02326 ,  H01L21/8221 ,  H01L21/823821 ,  H01L21/823878 ,  H01L27/0688 ,  H01L27/092 ,  H01L27/0922 ,  H01L27/0924 ,  H01L29/42392 ,  H01L29/66795 ,  H01L29/785 ,  H01L29/78696 ,  H01L21/823814

Abstract: The present disclosure is directed to a method for the fabrication of isolation structures between source/drain (S/D)) epitaxial structures of stacked transistor structures. The method includes depositing an oxygen-free dielectric material in an opening over a first epitaxial structure, where the oxygen-free dielectric material covers top surfaces of the first epitaxial structure and sidewall surfaces of the opening. The method also includes exposing the oxygen-free dielectric material to an oxidizing process to oxidize the oxygen-free dielectric material so that the oxidizing process does not oxidize a portion of the oxygen-free dielectric material on the first epitaxial structure. Further, etching the oxidized oxygen-free dielectric material and forming a second epitaxial layer on the oxygen-free dielectric material not removed by the etching to substantially the opening.

公开(公告)号：US11664268B2

公开(公告)日：2023-05-30

申请号：US17373339

申请日：2021-07-12

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chin-Hsiang Lin ,  Keng-Chu Lin ,  Shwang-Ming Jeng ,  Teng-Chun Tsai ,  Tsu-Hsiu Perng ,  Fu-Ting Yen

IPC: H01L27/088 ,  H01L21/762 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/66 ,  H01L29/78 ,  H01L21/8234

CPC classification number: H01L21/76229 ,  H01L21/823431 ,  H01L21/823821 ,  H01L21/823878 ,  H01L21/823892 ,  H01L27/0924 ,  H01L29/6681 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/785

Abstract: An embodiment method includes depositing a first dielectric film over and along sidewalls of a semiconductor fin, the semiconductor fin extending upwards from a semiconductor substrate. The method further includes depositing a dielectric material over the first dielectric film; recessing the first dielectric film below a top surface of the semiconductor fin to define a dummy fin, the dummy fin comprising an upper portion of the dielectric material; and forming a gate stack over and along sidewalls of the semiconductor fin and the dummy fin.

公开(公告)号：US11650500B2

公开(公告)日：2023-05-16

申请号：US17007897

申请日：2020-08-31

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Keng-Chu Lin ,  Joung-Wei Liou ,  Cheng-Han Wu ,  Ya Hui Chang

IPC: G03F7/16 ,  G03F7/038 ,  H01L21/027 ,  H01L21/311 ,  H01L21/3213 ,  G03F7/039 ,  G03F7/11 ,  G03F7/20 ,  G03F7/32

CPC classification number: G03F7/0388 ,  G03F7/038 ,  G03F7/0382 ,  G03F7/0397 ,  G03F7/11 ,  G03F7/167 ,  G03F7/2041 ,  G03F7/322 ,  G03F7/325 ,  H01L21/0271 ,  H01L21/31144 ,  H01L21/32139

Abstract: A system and method for depositing a photoresist and utilizing the photoresist are provided. In an embodiment a deposition chamber is utilized along with a first precursor material comprising carbon-carbon double bonds and a second precursor material comprising repeating units to deposit the photoresist onto a substrate. The first precursor material is turned into a plasma in a remote plasma chamber prior to being introduced into the deposition chamber. The resulting photoresist comprises a carbon backbone with carbon-carbon double bonds.

公开(公告)号：US20220415696A1

公开(公告)日：2022-12-29

申请号：US17702238

申请日：2022-03-23

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wei-Ting YEH ,  Zheng Yong Liang ,  De-Yang Chiou ,  Yu-Yun Peng ,  Keng-Chu Lin

IPC: H01L21/683 ,  H01L21/762

Abstract: The present disclosure describes a method to form a bonded semiconductor structure. The method includes forming a first bonding layer on a first wafer, forming a debonding structure on a second wafer, forming a second bonding layer on the debonding structure, bonding the first and second wafers with the first and second bonding layers, and debonding the second wafer from the first wafer via the debonding structure. The debonding structure includes a first barrier layer, a second barrier layer, and a water-containing dielectric layer between the first and second barrier layers.

公开(公告)号：US20220367662A1

公开(公告)日：2022-11-17

申请号：US17876313

申请日：2022-07-28

Applicant: Taiwan Semiconductor Manufacturing, Co., Ltd.

Inventor： Shuen-Shin Liang ,  Chun-I Tsai ,  Chih-Wei Chang ,  Chun-Hsien Huang ,  Hung-Yi Huang ,  Keng-Chu Lin ,  Ken-Yu Chang ,  Sung-Li Wang ,  Chia-Hung Chu ,  Hsu-Kai Chang

IPC: H01L29/45 ,  H01L23/535 ,  H01L21/768

Abstract: The present disclosure describes a method for forming liner-free or barrier-free conductive structures. The method includes forming a liner-free conductive structure on a cobalt conductive structure disposed on a substrate, depositing a cobalt layer on the liner-free conductive structure and exposing the liner-free conductive structure to a heat treatment. The method further includes removing the cobalt layer from the liner-free conductive structure.