公开(公告)号：US10262947B2

公开(公告)日：2019-04-16

申请号：US15823210

申请日：2017-11-27

Applicant: Tessera, Inc.

Inventor： Vage Oganesian ,  Ilyas Mohammed ,  Craig Mitchell ,  Belgacem Haba ,  Piyush Savalia

IPC: H01L23/538 ,  H01L23/48 ,  H01L25/065 ,  H01L27/146 ,  H01L29/06 ,  H01L23/00 ,  H01L23/31 ,  H01L25/00 ,  H01L25/10

Abstract: A structure including a first semiconductor chip with front and rear surfaces and a cavity in the rear surface. A second semiconductor chip is mounted within the cavity. The first chip may have vias extending from the cavity to the front surface and via conductors within these vias serving to connect an additional microelectronic element to the active elements of the first chip. The structure may have a volume comparable to that of the first chip alone and yet provide the functionality of a multi-chip assembly. A composite chip incorporating a body and a layer of semiconductor material mounted on a front surface of the body similarly may have a cavity extending into the body from the rear surface and may have an additional microelectronic element mounted in such cavity.

公开(公告)号：US10037940B2

公开(公告)日：2018-07-31

申请号：US15623228

申请日：2017-06-14

Applicant: Tessera, Inc.

Inventor： Cyprian Emeka Uzoh ,  Belgacem Haba ,  Craig Mitchell

IPC: H01L23/528 ,  H01L23/532 ,  H01L21/768 ,  H01L23/522 ,  H01L23/48 ,  H01L21/321 ,  H01L21/288

CPC classification number: H01L23/528 ,  H01L21/2885 ,  H01L21/3212 ,  H01L21/76802 ,  H01L21/76804 ,  H01L21/76807 ,  H01L21/76831 ,  H01L21/76834 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76849 ,  H01L21/76852 ,  H01L21/76868 ,  H01L21/76873 ,  H01L21/76879 ,  H01L21/76883 ,  H01L21/76885 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/5226 ,  H01L23/53209 ,  H01L23/53238 ,  H01L24/13 ,  H01L24/14 ,  H01L2221/1094 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/13025 ,  H01L2224/13111 ,  H01L2224/14181 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2224/05552

Abstract: Methods and apparatus for forming a semiconductor device are provided which may include any number of features. One feature is a method of forming an interconnect structure that results in the interconnect structure having a top surface and portions of the side walls of the interconnect structure covered in a dissimilar material. In some embodiments, the dissimilar material can be a conductive material or a nano-alloy. The interconnect structure can be formed by removing a portion of the interconnect structure, and covering the interconnect structure with the dissimilar material. The interconnect structure can comprise a damascene structure, such as a single or dual damascene structure, or alternatively, can comprise a silicon-through via (TSV) structure.

公开(公告)号：US09847277B2

公开(公告)日：2017-12-19

申请号：US15174983

申请日：2016-06-06

Applicant: Tessera, Inc.

Inventor： Vage Oganesian ,  Belgacem Haba ,  Ilyas Mohammed ,  Craig Mitchell ,  Piyush Savalia

IPC: H01L23/48 ,  H01L21/768 ,  H01L25/065 ,  H01L25/00 ,  H01L23/00 ,  H01L23/50

CPC classification number: H01L23/481 ,  H01L21/76898 ,  H01L23/50 ,  H01L24/03 ,  H01L24/05 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/06181 ,  H01L2224/16145 ,  H01L2224/32145 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06544 ,  H01L2924/01322 ,  H01L2924/07811 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A method of fabricating a semiconductor assembly can include providing a semiconductor element having a front surface, a rear surface, and a plurality of conductive pads, forming at least one hole extending at least through a respective one of the conductive pads by processing applied to the respective conductive pad from above the front surface, forming an opening extending from the rear surface at least partially through a thickness of the semiconductor element, such that the at least one hole and the opening meet at a location between the front and rear surfaces, and forming at least one conductive element exposed at the rear surface for electrical connection to an external device, the at least one conductive element extending within the at least one hole and at least into the opening, the conductive element being electrically connected with the respective conductive pad.

公开(公告)号：US09711401B2

公开(公告)日：2017-07-18

申请号：US15195641

申请日：2016-06-28

Applicant: Tessera, Inc.

Inventor： Cyprian Emeka Uzoh ,  Belgacem Haba ,  Craig Mitchell

IPC: H01L21/768 ,  H01L23/48 ,  H01L23/522 ,  H01L23/532 ,  H01L23/528 ,  H01L23/00

CPC classification number: H01L23/528 ,  H01L21/2885 ,  H01L21/3212 ,  H01L21/76802 ,  H01L21/76804 ,  H01L21/76807 ,  H01L21/76831 ,  H01L21/76834 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76849 ,  H01L21/76852 ,  H01L21/76868 ,  H01L21/76873 ,  H01L21/76879 ,  H01L21/76883 ,  H01L21/76885 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/5226 ,  H01L23/53209 ,  H01L23/53238 ,  H01L24/13 ,  H01L24/14 ,  H01L2221/1094 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/13025 ,  H01L2224/13111 ,  H01L2224/14181 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2224/05552

Abstract: Methods and apparatus for forming a semiconductor device are provided which may include any number of features. One feature is a method of forming an interconnect structure that results in the interconnect structure having a top surface and portions of the side walls of the interconnect structure covered in a dissimilar material. In some embodiments, the dissimilar material can be a conductive material or a nano-alloy. The interconnect structure can be formed by removing a portion of the interconnect structure, and covering the interconnect structure with the dissimilar material. The interconnect structure can comprise a damascene structure, such as a single or dual damascene structure, or alternatively, can comprise a silicon-through via (TSV) structure.

公开(公告)号：US08809190B2

公开(公告)日：2014-08-19

申请号：US14104407

申请日：2013-12-12

Applicant: Tessera, Inc.

Inventor： Vage Oganesian ,  Belgacem Haba ,  Ilyas Mohammed ,  Craig Mitchell ,  Piyush Savalia

IPC: H01L21/44

CPC classification number: H01L23/49827 ,  H01L21/6835 ,  H01L23/481 ,  H01L23/49838 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2223/6622 ,  H01L2224/05009 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05555 ,  H01L2224/0557 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/06181 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15788 ,  H01L2924/3011 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A microelectronic unit includes a semiconductor element consisting essentially of semiconductor material and having a front surface, a rear surface, a plurality of active semiconductor devices adjacent the front surface, a plurality of conductive pads exposed at the front surface, and an opening extending through the semiconductor element. At least one of the conductive pads can at least partially overlie the opening and can be electrically connected with at least one of the active semiconductor devices. The microelectronic unit can also include a first conductive element exposed at the rear surface for connection with an external component, the first conductive element extending through the opening and electrically connected with the at least one conductive pad, and a second conductive element extending through the opening and insulated from the first conductive element. The at least one conductive pad can overlie a peripheral edge of the second conductive element.

Abstract translation: 微电子单元包括基本上由半导体材料组成的半导体元件，其具有前表面，后表面，与前表面相邻的多个有源半导体器件，在前表面暴露的多个导电焊盘，以及延伸穿过 半导体元件。 至少一个导电焊盘可以至少部分地覆盖开口并且可以与至少一个有源半导体器件电连接。 微电子单元还可以包括暴露在后表面处以与外部部件连接的第一导电元件，第一导电元件延伸穿过开口并与至少一个导电焊盘电连接，第二导电元件延伸穿过开口 并与第一导电元件绝缘。 至少一个导电焊盘可以覆盖在第二导电元件的周边边缘上。

公开(公告)号：US20140206147A1

公开(公告)日：2014-07-24

申请号：US14224379

申请日：2014-03-25

Applicant: TESSERA, INC.

Inventor： Vage Oganesian ,  Belgacem Haba ,  Ilyas Mohammed ,  Craig Mitchell ,  Piyush Savalia

IPC: H01L23/00 ,  H01L21/78

CPC classification number: H01L23/481 ,  H01L21/76802 ,  H01L21/76805 ,  H01L21/76877 ,  H01L21/76898 ,  H01L21/78 ,  H01L23/145 ,  H01L23/147 ,  H01L23/49827 ,  H01L24/11 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L24/89 ,  H01L24/92 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/13009 ,  H01L2224/13099 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/83 ,  H01L2224/9202 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01049 ,  H01L2924/01061 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2224/05552 ,  H01L2924/00

Abstract: A microelectronic assembly is provided which includes a first element consisting essentially of at least one of semiconductor or inorganic dielectric material having a surface facing and attached to a major surface of a microelectronic element at which a plurality of conductive pads are exposed, the microelectronic element having active semiconductor devices therein. A first opening extends from an exposed surface of the first element towards the surface attached to the microelectronic element, and a second opening extends from the first opening to a first one of the conductive pads, wherein where the first and second openings meet, interior surfaces of the first and second openings extend at different angles relative to the major surface of the microelectronic element. A conductive element extends within the first and second openings and contacts the at least one conductive pad.

Abstract translation: 提供了一种微电子组件，其包括基本上由半导体或无机电介质材料中的至少一种构成的第一元件，该介电材料具有面向并附着到微电子元件的主表面的表面，在该电子元件的主表面处暴露多个导电焊盘，该微电子元件具有 其中有源半导体器件。 第一开口从第一元件的暴露表面延伸到附接到微电子元件的表面，并且第二开口从第一开口延伸到第一导电焊盘中，其中第一和第二开口相交，其中内表面 第一和第二开口相对于微电子元件的主表面以不同的角度延伸。 导电元件在第一和第二开口内延伸并接触至少一个导电垫。

公开(公告)号：US20140203452A1

公开(公告)日：2014-07-24

申请号：US14094621

申请日：2013-12-02

Applicant: Tessera, Inc.

Inventor： Vage Oganesian ,  Ilyas Mohammed ,  Craig Mitchell ,  Belgacem Haba ,  Piyush Savalia

IPC: H01L23/538

CPC classification number: H01L23/5384 ,  H01L23/3114 ,  H01L23/481 ,  H01L24/05 ,  H01L24/06 ,  H01L24/16 ,  H01L24/17 ,  H01L24/19 ,  H01L24/20 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/94 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14645 ,  H01L29/0657 ,  H01L2224/0237 ,  H01L2224/0401 ,  H01L2224/05552 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/13024 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/1703 ,  H01L2224/32145 ,  H01L2224/73204 ,  H01L2224/81805 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06544 ,  H01L2225/06555 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01322 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/1434 ,  H01L2924/1436 ,  H01L2924/1437 ,  H01L2924/18161 ,  H01L2224/81 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A structure including a first semiconductor chip with front and rear surfaces and a cavity in the rear surface. A second semiconductor chip is mounted within the cavity. The first chip may have vias extending from the cavity to the front surface and via conductors within these vias serving to connect the additional microelectronic element to the active elements of the first chip. The structure may have a volume comparable to that of the first chip alone and yet provide the functionality of a multi-chip assembly. A composite chip incorporating a body and a layer of semiconductor material mounted on a front surface of the body similarly may have a cavity extending into the body from the rear surface and may have an additional microelectronic element mounted in such cavity.

Abstract translation: 一种结构，包括具有前表面和后表面的第一半导体芯片以及后表面中的空腔。 第二个半导体芯片安装在腔内。 第一芯片可以具有从空腔延伸到前表面的通孔，以及用于将附加的微电子元件连接到第一芯片的有源元件的这些通孔内的导体。 该结构可以具有与第一芯片单独的体积相当的体积，并且提供多芯片组件的功能。 安装在主体的前表面上的主体和半导体材料层的复合芯片类似地可以具有从后表面延伸到主体中的空腔，并且可以具有安装在该空腔中的附加的微电子元件。

公开(公告)号：US20140131892A1

公开(公告)日：2014-05-15

申请号：US14162011

申请日：2014-01-23

Applicant: Tessera, Inc.

Inventor： Vage Oganesian ,  Belgacem Haba ,  Ilyas Mohammed ,  Craig Mitchell ,  Piyush Savalia

IPC: H01L23/00 ,  H01L23/538

CPC classification number: H01L24/80 ,  H01L21/6835 ,  H01L21/76805 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/5384 ,  H01L24/02 ,  H01L24/24 ,  H01L24/25 ,  H01L24/27 ,  H01L24/32 ,  H01L24/82 ,  H01L24/83 ,  H01L24/92 ,  H01L24/94 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68327 ,  H01L2221/68372 ,  H01L2224/0231 ,  H01L2224/0235 ,  H01L2224/02371 ,  H01L2224/2401 ,  H01L2224/2405 ,  H01L2224/24146 ,  H01L2224/244 ,  H01L2224/2512 ,  H01L2224/32225 ,  H01L2224/82005 ,  H01L2224/821 ,  H01L2224/82106 ,  H01L2224/83005 ,  H01L2224/83191 ,  H01L2224/8385 ,  H01L2224/92 ,  H01L2224/9202 ,  H01L2224/92244 ,  H01L2224/93 ,  H01L2224/94 ,  H01L2225/06544 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/1434 ,  H01L2924/1436 ,  H01L2924/1437 ,  H01L2224/27 ,  H01L2224/83 ,  H01L2224/82 ,  H01L2924/00

Abstract: An assembly and method of making same are provided. The assembly can be formed by juxtaposing a first electrically conductive element overlying a major surface of a first semiconductor element with an electrically conductive pad exposed at a front surface of a second semiconductor element. An opening can be formed extending through the conductive pad of the second semiconductor element and exposing a surface of the first conductive element. The opening may alternatively be formed extending through the first conductive element. A second electrically conductive element can be formed extending at least within the opening and electrically contacting the conductive pad and the first conductive element. A third semiconductor element can be positioned in a similar manner with respect to the second semiconductor element.

Abstract translation: 提供了组装和制造方法。 可以通过将覆盖在第一半导体元件的主表面上的第一导电元件与暴露在第二半导体元件的前表面处的导电焊盘并置来形成该组件。 可以形成延伸穿过第二半导体元件的导电焊盘并露出第一导电元件的表面的开口。 开口可替代地形成为延伸穿过第一导电元件。 第二导电元件可以形成为至少在开口内延伸并且电接触导电垫和第一导电元件。 第三半导体元件可以相对于第二半导体元件以类似的方式定位。

公开(公告)号：US10354942B2

公开(公告)日：2019-07-16

申请号：US15842080

申请日：2017-12-14

Applicant: Tessera, Inc.

Inventor： Vage Oganesian ,  Belgacem Haba ,  Ilyas Mohammed ,  Craig Mitchell ,  Piyush Savalia

IPC: H01L23/48 ,  H01L21/768 ,  H01L25/065 ,  H01L25/00 ,  H01L23/00 ,  H01L23/50

Abstract: A method of fabricating a semiconductor assembly can include providing a semiconductor element having a front surface, a rear surface, and a plurality of conductive pads, forming at least one hole extending at least through a respective one of the conductive pads by processing applied to the respective conductive pad from above the front surface, forming an opening extending from the rear surface at least partially through a thickness of the semiconductor element, such that the at least one hole and the opening meet at a location between the front and rear surfaces, and forming at least one conductive element exposed at the rear surface for electrical connection to an external device, the at least one conductive element extending within the at least one hole and at least into the opening, the conductive element being electrically connected with the respective conductive pad.

公开(公告)号：US20180254213A1

公开(公告)日：2018-09-06

申请号：US15971466

申请日：2018-05-04

Applicant: Tessera, Inc.

Inventor： Vage Oganesian ,  Belgacem Haba ,  Craig Mitchell ,  Ilyas Mohammed ,  Piyush Savalia

IPC: H01L21/768 ,  H01L25/10 ,  H01L25/11 ,  H01L25/16 ,  H01L25/00 ,  H01L23/00 ,  H01L23/538 ,  H01L23/498 ,  H01L23/31 ,  H01L23/13

CPC classification number: H01L21/76819 ,  H01L21/76877 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/49827 ,  H01L23/4985 ,  H01L23/5389 ,  H01L24/18 ,  H01L24/19 ,  H01L24/24 ,  H01L24/25 ,  H01L24/82 ,  H01L24/97 ,  H01L25/105 ,  H01L25/117 ,  H01L25/16 ,  H01L25/50 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/24227 ,  H01L2224/24247 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/82 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2225/1023 ,  H01L2225/1029 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1052 ,  H01L2225/1058 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01061 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/07811 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15156 ,  H01L2924/15165 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15313 ,  H01L2924/15331 ,  H01L2924/157 ,  H01L2924/15788 ,  H01L2924/18161 ,  Y10T29/49002 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2224/83

Abstract: A microelectronic unit can include a carrier structure having a front surface, a rear surface remote from the front surface, and a recess having an opening at the front surface and an inner surface located below the front surface of the carrier structure. The microelectronic unit can also include a microelectronic element having a top surface adjacent the inner surface, a bottom surface remote from the top surface, and a plurality of contacts at the top surface. The microelectronic unit can also include terminals electrically connected with the contacts of the microelectronic element. The terminals can be electrically insulated from the carrier structure. The microelectronic unit can also include a dielectric region contacting at least the bottom surface of the microelectronic element. The dielectric region can define a planar surface located coplanar with or above the front surface of the carrier structure.