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公开(公告)号:US20240099154A1
公开(公告)日:2024-03-21
申请号:US18515273
申请日:2023-11-21
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Hui-Lin Wang , Si-Han Tsai , Dong-Ming Wu , Chen-Yi Weng , Ching-Hua Hsu , Ju-Chun Fan , Yi-Yu Lin , Che-Wei Chang , Po-Kai Hsu , Jing-Yin Jhang
CPC classification number: H10N50/10 , G11C11/161 , H01F10/3254 , H10B61/00 , H10N50/80 , H10N50/85
Abstract: A magnetoresistive random access memory (MRAM) device includes a first array region and a second array region on a substrate, a first magnetic tunneling junction (MTJ) on the first array region, a first top electrode on the first MTJ, a second MTJ on the second array region, and a second top electrode on the second MTJ. Preferably, the first top electrode and the second top electrode include different nitrogen to titanium (N/Ti) ratios.
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公开(公告)号:US11637233B2
公开(公告)日:2023-04-25
申请号:US17086447
申请日:2020-11-01
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Hui-Lin Wang , Chen-Yi Weng , Si-Han Tsai , Che-Wei Chang , Po-Kai Hsu , Jing-Yin Jhang , Yu-Ping Wang , Ju-Chun Fan , Ching-Hua Hsu , Yi-Yu Lin , Hung-Yueh Chen
Abstract: A method for fabricating a semiconductor device includes the steps of forming a magnetic tunneling junction (MTJ) on a MRAM region of a substrate, forming a first inter-metal dielectric (IMD) layer around the MTJ, forming a patterned mask on a logic region of the substrate, performing a nitridation process to transform part of the first IMD layer to a nitride layer, forming a first metal interconnection on the logic region, forming a stop layer on the first IMD layer, forming a second IMD layer on the stop layer, and forming a second metal intercom in the second IMD layer to connect to the MTJ.
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公开(公告)号:US20220102621A1
公开(公告)日:2022-03-31
申请号:US17086447
申请日:2020-11-01
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Hui-Lin Wang , Chen-Yi Weng , Si-Han Tsai , Che-Wei Chang , Po-Kai Hsu , Jing-Yin Jhang , Yu-Ping Wang , Ju-Chun Fan , Ching-Hua Hsu , Yi-Yu Lin , Hung-Yueh Chen
Abstract: A method for fabricating a semiconductor device includes the steps of forming a magnetic tunneling junction (MTJ) on a MRAM region of a substrate, forming a first inter-metal dielectric (IMD) layer around the MTJ, forming a patterned mask on a logic region of the substrate, performing a nitridation process to transform part of the first IMD layer to a nitride layer, forming a first metal interconnection on the logic region, forming a stop layer on the first IMD layer, forming a second IMD layer on the stop layer, and forming a second metal intercom in the second IMD layer to connect to the MTJ.
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公开(公告)号:US10396204B2
公开(公告)日:2019-08-27
申请号:US15700193
申请日:2017-09-11
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Che-Wei Chang , Chun-Hsiung Wang , Chih-Wei Chen
Abstract: A semiconductor device includes: a gate structure extending along a first direction on a substrate, in which the gate structure includes a first edge and a second edge extending along the first direction; a first doped region adjacent to one side of the gate structure, in which the first doped region includes a third edge and a fourth edge extending along the first direction; a second doped region adjacent to another side of the gate structure, in which the second doped region comprises a fifth edge and a sixth edge extending along the first direction; a first fin-shaped structure extending from the second edge of the gate structure toward the third edge of the first doped region; and a second fin-shaped structure extending from the first edge of the gate structure toward the sixth edge of the second doped region.
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