Abstract:
An adaptive equalizer including an equalizer filter and a tap coefficients generator used to process a sample data stream derived from a plurality of received signals is disclosed. The tap coefficients generator includes an equalizer tap update unit, a vector norm square estimator, an active taps mask generator, a switch and a pilot amplitude reference unit used to minimize the dynamic range of the equalizer filter. A dynamic mask vector is used to mask active taps generated by the equalizer tap update unit when an unmasked signal output by the equalizer filter is selected by the switch to generate an error signal fed to the equalizer tap update unit. A fixed mask vector is used to mask active taps generated by the equalizer tap update unit when a masked signal output by the equalizer filter is used to generate the error signal.
Abstract:
A method and apparatus for identifying a code group representative of a predetermined number of base stations is disclosed. A chip offset within a frame is input into a first correlator. A plurality of samples of chips at which a primary synchronization code (PSC) has been detected are input into the first correlator. Output of the first correlator is multiplied by the complex conjugate of the PSC to obtain a magnitude for the signals being transmitted at the chips inputted into the first correlator. The magnitude is summed over four frames. The summed signals view of a predetermined set of decision variables is evaluated. A case number, a code group, a timeslot location, and a system frame number are determined based on the evaluation and noise estimation.
Abstract:
A method and apparatus for estimating and correcting baseband frequency error in a receiver. In one embodiment, an equalizer performs equalization on a sample data stream and generates filter tap values based on the equalization. An estimated frequency error signal is generated based on at least one of the filter tap values. A rotating phasor is generated based on the estimated frequency error signal. The rotating phasor signal is multiplied with the sample data stream to correct the frequency of the sample data stream. In another embodiment, a channel estimator performs channel estimation and generates Rake receiver finger weights based on at least one of the finger weights. An estimated frequency error signal is generated based on at least one of the finger weights.
Abstract:
A method and system for performing initial cell search is disclosed. Step 1 processing is preformed to detect a peak primary synchronization code (PSC) location (i.e. chip offset or chip location). Step 2 processing is performed to obtain the toffset and code group. Step 3 processing is performed to identify the midamble of a base station with which the WTRU performing the initial cell search may synchronize with.
Abstract:
A User Equipment (UE) has a circuit that performs the acquisition for the low chip rate option of the Universal Mobile Telecommunication System (UMTS) Time Division Duplex (TDD) standard as formulated by the Third Generation Partnership Project (3GPP). The present invention implements the detection of the basic SYNC code; the determination of the midamble used and the detection of the superframe timing based on SYNC code modulation sequence. This enables reading of a full Broadcast Channel (BCH) message.
Abstract:
A digital baseband (DBB) receiver for receiving and processing a wireless communication signal. The DBB receiver includes at least one low noise amplifier (LNA), at least one demodulator, a direct current (DC) discharge circuit and an LNA control circuit. The LNA selectively amplifies the communication signal. The demodulator outputs analog real and imaginary signal components on real and imaginary signal paths, respectively, in response to receiving the communication signal from the LNA. The DC discharge circuit selectively discharges DC accumulating on at least one of the real and imaginary signal paths. The LNA control circuit turns the LNA on or off.
Abstract:
A digital baseband (DBB) receiver for receiving and processing a wireless communication signal. The DBB receiver includes at least one low noise amplifier (LNA), at least one demodulator, a direct current (DC) discharge circuit and an LNA control circuit. The LNA selectively amplifies the communication signal. The demodulator outputs analog real and imaginary signal components on real and imaginary signal paths, respectively, in response to receiving the communication signal from the LNA. The DC discharge circuit selectively discharges DC accumulating on at least one of the real and imaginary signal paths. The LNA control circuit turns the LNA on or off.
Abstract:
A digital baseband (DBB) radio frequency (RF) receiver used for receiving and processing a wireless communication signal. The DBB receiver includes a demodulator, first and second analog low pass filters (LPFs), first and second digital gain control circuits, and a digital time domain compensation module which removes group delay variation distortion, introduced by the first and second analog LPFs, from real and imaginary signal components of the communication signal.
Abstract:
A communication system including an automatic control (AGC) circuit, a receiver, an analog to digital converter (ADC) and an insertion phase variation compensation module. The AGC circuit receives and amplifies communication signals. The gain of the AGC circuit is continuously adjusted. The AGC circuit outputs an amplified signal to the receiver which, in turn, outputs an analog complex signal to the ADC. The ADC outputs a digital complex signal to an insertion phase variation compensation module which counteracts the effects of phase offsets introduced into the communication signal due to the continuous gain adjustments associated with the AGC circuit.
Abstract:
A user equipment (UE) for establishing a communication link comprising a first module for processing a received communication signal and generating an index value associated with a primary synchronization code within said communication signal; a second module for generating a scrambling code group number, a slot offset, and secondary synchronization code based on output provided by the first module; a third module for retrieving a primary scrambling code based on the scrambling code group number and slot offset; and a controller coupled to said first module, second module, and third module for controlling an a search frequency of the UE for establishing a communication link.