Abstract:
An electrolytic capacitor comprises a wound body including a wound anode foil with a surface on which a dielectric layer is formed, a solid electrolyte layer formed on a surface of the dielectric layer, a cathode layer formed on a surface of the solid electrolyte layer over the outer circumference of the wound body, a plurality of anode leads electrically connected to the anode foil, and a plurality of cathode leads provided in one-to-one relationship with the anode leads and electrically connected to the cathode layer. The edge surface is a part of the surface of the wound body and crosses the winding axis of the wound body. Each of the cathode leads is electrically connected to an outer circumference of the cathode layer at a position near an anode lead corresponding to this cathode lead.
Abstract:
An electric driver includes a hook portion which is constituted by a deformable hook-like portion and a connecting portion for connecting the hook-like portion to the handle. The hook-like portion is constituted by a base portion connected to the connecting portion and a bent portion continuous to the base portion, and a front end portion continuous to the bent portion and arranged at a position substantially opposed to the base portion. The front end portion and the base portion can be proximate to and remote from each other. The connecting portion holds the hook-like portion in a direction substantially the same as a direction in which the handle extends. The hook-like portion is pivotably held on a first rotating axis center extending in substantially the same direction as the handle.
Abstract:
A semiconductor integrated circuit device has a first MIS transistor of a first conductivity type, a second MIS transistor of a second conductivity type, a resistor connected in series between a first power-source line and a second power-source line, and a third MIS transistor of the first conductivity type. The third MIS transistor has a gate connected to a node where the first MIS transistor and the second MIS transistor are connected together, and a drain connected to a connection node where the second MIS transistor and the resistor are connected together.
Abstract:
To provide a compact portable fastening tool which can be easily pushed at its handle portion onto a punched side, even in case a magazine is attached at an inclination with respect to the horizon, so that it can be easily used even in a narrow place. An electric fastening tool 1 comprises: a housing 2 having a handle portion 2B formed to extend from a trunk portion 2A; an ejection unit attached to the lower portion of the housing 2; a magazine 5 attached to the ejection unit; a motor housed in the housing 2; a battery pack 3 for driving the motor; a flywheel rotationally driven by the motor; a follower shaft selectively rotated by the kinetic energy of the flywheel; and a plunger adapted to be linearly moved in the housing 2 by the rotation of the follower shaft thereby to drive the nail fed into the ejection unit. The magazine 5 is so attached that it is inclined in a side view with respect to the trunk portion 2A of the housing 2 and that it is inclined in a bottom view with respect to the handle portion 2B of the housing 2.
Abstract:
An object of the present invention is to provide a method for conveniently analyzing sugar chain (isomer) structure using a sample of approximately 1 picomole, which is generally subjected to analysis in proteomics without using any sugar chain preparation. The present invention relates to a method for analyzing sugar chain structure, comprising a step of obtaining the fragmentation pattern of a test sugar chain through fragmentation of the test sugar chain and a step of predicting the structure of the test sugar chain through comparison of the sugar chain predicted fragmentation pattern data generated based on fragmentation pattern templates with the fragmentation pattern of the test sugar chain.
Abstract:
A level shift circuit for converting a first signal level into a second signal level, includes a load circuit connected to the second power supply voltage, a first high voltage-resistant transistor in which a drain is connected to the load circuit, and a predetermined constant voltage is applied to a gate, a source voltage control circuit controls a voltage level of the source of the first high voltage-resistant transistor in accordance with an input signal at the first signal level, and has a second low voltage-resistant transistor, and an output terminal which is connected between the drain of the first high voltage-resistant transistor and the load circuit for outputting an output signal at the second signal level. A gate insulating film of the low voltage-resistant transistor has a voltage resistance lower than that of a gate insulating film of the high voltage-resistant transistor.
Abstract:
The invention provides a process for fabricating a solid electrolytic capacitor of the chip type which process includes the steps of plating a fabrication frame comprising an anode terminal member and a cathode terminal member projecting from a pair of side frame members respectively so as to be opposed to each other, the anode terminal member being stepped so as to provide a lower portion toward the cathode terminal member, a hole extending vertically and being formed in each of the anode terminal member and a higher portion of the cathode terminal member, joining an anode lead of a capacitor element to an upper surface of the cathode terminal member and a bottom surface of the capacitor element to an upper surface of the lower portion of the cathode terminal member, forming a packaging resin portion around the capacitor element without permitting resin to ingress into the holes, and cutting the anode and cathode terminal members along vertical planes extending through the respective holes.
Abstract:
The occurrence of uneven image density is presented, as well as image degradation caused by inhibiting the continuity of image density, produced by a photoreceptor in which uneven electrification exists, and additionally uneven sensitivity coexists without enlargement of the apparatus as well as increase in the cost. To the exposure amount obtained by the approximate linear transformation of the pixel gradation in each segment multi-divided in the surface of the photoreceptor drum, in all the pixel gradation including 0 level, an exposing source is controlled to exposure with the amount of exposure, offset with only the offset exposure amount Ea which corresponds to the difference between the initial electric potential and the reference initial electric potential V0 of the segment. The exposure amount adjustment of the offset exposure amount Ea is conducted by offsetting the exposure time in each pixel.
Abstract:
An anode terminal or a cathode terminal is provided with an exposure portion that extends substantially perpendicularly to an arrangement direction of the two terminals and that have an end face exposed on a side face of a housing. At least the end face on the exposure portion is plated for improving the solder wettability. Furthermore, a front end portion of the exposure portion is bent upwards along a peripheral face of the housing.
Abstract:
An image forming apparatus is provided that is capable of forming an image with excellent gradation quality without affected by variations in the sensitivity characteristic of the photoreceptor and the light quantity characteristic of the LED print head among individual products. A highest gradation appropriate exposure amount appropriate for the highest gradation is calculated from the sensitivity characteristic of the photoreceptor and the light quantity characteristic of the LED print head. Then, based on the highest gradation appropriate exposure amount, an appropriate lighting time of the LEDs that is appropriate for each gradation is calculated so that the increment of the exposure amount between the gradations including the first gradation, and the lighting times of the gradations are set based on the appropriate lighting times. Then, the LEDs are lit for the lighting time set in accordance with the gradation of the inputted image data.