公开(公告)号：US20130154100A1

公开(公告)日：2013-06-20

申请号：US13328419

申请日：2011-12-16

Applicant: Jhun Hua CHEN ,  Yu-Lung TUNG ,  Chi-Tien CHEN ,  Hua-Tai LIN ,  Hsiang-Lin CHEN ,  Hung-Chang HSIEH ,  Yi-Fan CHEN

Inventor： Jhun Hua CHEN ,  Yu-Lung TUNG ,  Chi-Tien CHEN ,  Hua-Tai LIN ,  Hsiang-Lin CHEN ,  Hung-Chang HSIEH ,  Yi-Fan CHEN

IPC: H01L23/48 ,  H01L21/28

CPC classification number: H01L23/528 ,  H01L21/31144 ,  H01L21/76897 ,  H01L21/8238 ,  H01L21/823871 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A pattern on a semiconductor substrate is formed using two separate etching processes. The first etching process removes a portion of an intermediate layer above an active region of the substrate. The second etching process exposes a portion of the active region of the substrate. A semiconductor device formed using the patterning method has a decreased mask error enhancement factor and increased critical dimension uniformity than the prior art.

Abstract translation: 使用两个单独的蚀刻工艺形成半导体衬底上的图案。 第一蚀刻工艺除去衬底的有源区上方的中间层的一部分。 第二蚀刻工艺暴露了衬底的一部分有源区。 使用图案化方法形成的半导体器件具有比现有技术更低的掩模误差增强因子和增加的临界尺寸均匀性。

公开(公告)号：US20110241207A1

公开(公告)日：2011-10-06

申请号：US12753272

申请日：2010-04-02

Applicant: Cheng Cheng Kuo ,  Luke Lo ,  Minghsing Tsai ,  Ken-Yu Chang ,  Jye-Yen Cheng ,  Jeng-Shiun Ho ,  Hua-Tai Lin ,  Chih-Hsiang Yao

Inventor： Cheng Cheng Kuo ,  Luke Lo ,  Minghsing Tsai ,  Ken-Yu Chang ,  Jye-Yen Cheng ,  Jeng-Shiun Ho ,  Hua-Tai Lin ,  Chih-Hsiang Yao

IPC: H01L23/52 ,  G06F17/50

CPC classification number: H01L21/76838 ,  G06F17/5068 ,  G06F17/5072 ,  G06F17/5077 ,  H01L23/522 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Semiconductor integrated circuit line structures for improving a process window in the vicinity of dense-to-isolated pattern transition areas and a technique to implement the line structures in the layout process are described in this disclosure. The disclosed structure includes a semiconductor substrate, and a material layer above the substrate. The material layer has a closely spaced dense line structure, an isolated line structure next to the dense line structure, and a dummy line shoulder structure formed in the vicinity of the dense line and the isolated line structures. One end of the dummy line shoulder structure connects to the isolated line structure and another end extends away from the isolated line structure in an orientation substantially perpendicular to the isolated line structure.

Abstract translation: 在本公开中描述了用于改善密集到隔离图案转移区域附近的处理窗口的半导体集成电路线结构和在布局处理中实现线结构的技术。 所公开的结构包括半导体衬底和衬底上方的材料层。 材料层具有紧密间隔的密集线结构，紧密密集线结构旁边的隔离线结构，以及形成在密集线附近和隔离线结构处的虚拟线肩结构。 虚拟线肩结构的一端连接到隔离线结构，另一端以基本垂直于隔离线结构的方向远离隔离线结构延伸。

公开(公告)号：US07939222B2

公开(公告)日：2011-05-10

申请号：US11687497

申请日：2007-03-16

Applicant: Jhun-Hua Chen ,  Hua-Tai Lin ,  Lai Chien Wen ,  Fu-Jye Liang

Inventor： Jhun-Hua Chen ,  Hua-Tai Lin ,  Lai Chien Wen ,  Fu-Jye Liang

IPC: G03F1/00 ,  H01L21/00 ,  G06F17/50

CPC classification number: G03F1/36

Abstract: A photolithography system for printing a pattern of at least one contact or via on a wafer is provided. The system comprises a reticle having a layout, the layout comprises at least one polygon-shaped hole, wherein the at least one polygon-shaped hole comprises at least eight sides.

Abstract translation: 提供了一种用于在晶片上印刷至少一个接触或通孔的图案的光刻系统。 该系统包括具有布局的掩模版，布局包括至少一个多边形孔，其中至少一个多边形孔包括至少八个边。

公开(公告)号：US20060083997A1

公开(公告)日：2006-04-20

申请号：US11248070

申请日：2005-10-12

Applicant: Burn Lin ,  Jeng-Horng Chen ,  Chun-Kuang Chen ,  Tsai-Sheng Gau ,  Ru-Gun Liu ,  Jen-Chieh Shih ,  Hua-Tai Lin ,  Hung Hsieh

Inventor： Burn Lin ,  Jeng-Horng Chen ,  Chun-Kuang Chen ,  Tsai-Sheng Gau ,  Ru-Gun Liu ,  Jen-Chieh Shih ,  Hua-Tai Lin ,  Hung Hsieh

IPC: A47G1/12 ,  G03F1/14 ,  G03F1/00

CPC classification number: G03F1/38

Abstract: Disclosed is a photomask comprising a transparent substrate, an absorption layer proximate to the transparent substrate, and a pellicle mounted proximate to the transparent substrate. The absorption layer has at least one opening formed therein for receiving a wavelength-reducing material (WRM). The wavelength-reducing material and the absorption layer form a generally planar surface.

Abstract translation: 公开了一种光掩模，其包括透明基板，靠近透明基板的吸收层和靠近透明基板安装的防护薄膜组件。 吸收层具有形成在其中的至少一个开口用于接收波长减小材料（WRM）。 波长减小材料和吸收层形成大致平坦的表面。

公开(公告)号：US06569760B1

公开(公告)日：2003-05-27

申请号：US09785113

申请日：2001-02-20

Applicant: Hua-Tai Lin ,  Kung Linliu

Inventor： Hua-Tai Lin ,  Kung Linliu

IPC: H01L2128

CPC classification number: H01L21/76808 ,  H01L21/02115 ,  H01L21/02118 ,  H01L21/0212 ,  H01L21/02131 ,  H01L21/31144 ,  H01L21/3127 ,  H01L21/76813 ,  H01L2221/1063 ,  Y10S438/976

Abstract: A method for fabricating a via openings, comprising the following steps. A semiconductor structure is provided. A low-k layer is formed upon the semiconductor structure. A via opening is formed within the low-k layer. An inert polymer liner layer is formed upon the low-k layer and within the via opening. A photoresist layer is formed upon the inert polymer liner layer, filling the inert polymer lined via opening. The inert polymer liner layer preventing adverse chemical reactions between the photoresist layer and portions of the low-k layer. The photoresist layer is patterned to expose the inert polymer lined via opening and portions of the inert polymer lined low-k layer adjacent the via opening. The exposed inert polymer lined via opening and portions of the inert polymer lined low-k layer adjacent the via opening and the portions of the inert polymer liner layer upon the via opening and portions of the inert polymer lined low-k layer adjacent the via opening are etched to form a structure opening. The patterned photoresist layer is removed. The structure is cleaned and a planarized metal structure is formed within the structure opening.

Abstract translation: 一种制造通孔的方法，包括以下步骤。 提供半导体结构。 在半导体结构上形成低k层。 在低k层内形成通孔。 惰性聚合物衬里层形成在低k层上和通孔孔内。 在惰性聚合物衬里层上形成光致抗蚀剂层，填充通过开口衬里的惰性聚合物。 惰性聚合物衬里层防止光致抗蚀剂层与低k层的部分之间的不利的化学反应。 图案化光致抗蚀剂层以暴露通过开口衬里的惰性聚合物和邻近通孔开口的惰性聚合物衬里的低k层的部分。 通过开口衬里的暴露的惰性聚合物和邻近通孔开口的惰性聚合物衬里的低k层的部分和惰性聚合物衬垫层的部分通孔开口和惰性聚合物衬里的低k层的部分邻近通孔开口 被蚀刻以形成结构开口。 去除图案化的光致抗蚀剂层。 清洁结构，在结构开口内形成平面化的金属结构。

公开(公告)号：US06306558B1

公开(公告)日：2001-10-23

申请号：US09301221

申请日：1999-04-29

Applicant: Hua-Tai Lin

Inventor： Hua-Tai Lin

IPC: G03F720

CPC classification number: G03F7/2022 ,  G03F1/28 ,  G03F1/34 ,  G03F1/70

Abstract: A phase shifting mask set and method of suing the phase shifting mask set to pattern a layer of negative photoresist. The mask set comprises a first phase shifting mask and a second phase shifting mask. The first phase shifting mask has regions of 90° phase shift and −90° phase shift in the contact hole regions of the mask. The second phase shift mask also has regions of 90° phase shift and −90° phase shift in the contact hole regions of the mask. In the second phase shift mask the 90° phase shift regions are rotated 90° spatially with respect to the 90° phase shift regions of the first phase shift mask and the −90° phase shift regions are rotated 90° spatially with respect to the −90° phase shift regions of the first phase shift mask. A layer of negative photoresist is exposed with the first and second phase shift masks and developed to form the photoresist pattern used to form contact holes.

Abstract translation: 一种相移掩模集和起诉相移掩模集合以对一层负性光致抗蚀剂进行图案化的方法。 掩模组包括第一相移掩模和第二相移掩模。 第一相移掩模在掩模的接触孔区域中具有90°相移和-90°相移的区域。 第二相移掩模在掩模的接触孔区域中也具有90°相移和-90°相移的区域。 在第二相移掩模中，90°相移区域相对于第一相移掩模的90°相移区域在空间上旋转90°，并且-90°相移区域在空间上相对于第一相移掩模旋转90°， 第一相移掩模的90°相移区域。 用第一和第二相移掩模露出一层负性光致抗蚀剂，并显影以形成用于形成接触孔的光致抗蚀剂图案。