公开(公告)号：US20210273565A1

公开(公告)日：2021-09-02

申请号：US17201712

申请日：2021-03-15

Applicant: Apple Inc.

Inventor： Sanjay Pant ,  Fabio Gozzini ,  Hubert Attah ,  Jonathan F. Bolus ,  Wenxun Huang

IPC: H02M3/158 ,  H02M3/157 ,  G06F1/3203 ,  H03M1/12

Abstract: A voltage regulator circuit included in a computer system may include multiple phase circuits each coupled to a regulated power supply node via a corresponding inductor. The phase circuits may modify a voltage level of the regulated power supply node using respective control signals generated by a digital control circuit that processes multiple data bits. An analog-to-digital converter circuit may compare the voltage level of the regulated power supply node to multiple reference voltage levels and sample the resultant comparisons to generate the multiple data bits.

公开(公告)号：US11036581B2

公开(公告)日：2021-06-15

申请号：US16535643

申请日：2019-08-08

Applicant: Apple Inc.

Inventor： Wei Chen ,  Sanjay Pant

IPC: G06F11/10 ,  G11C29/52

Abstract: An apparatus includes a non-volatile storage circuit that includes a primary copy of a data value in a first storage location and a redundant copy of the data value in a second, different storage location. The data value includes one or more bits. The apparatus further includes an error detection circuit configured to retrieve contents of the first and second storage locations in response to a request for the data value. The error detection circuit is further configured to perform an error correction operation on the retrieved contents of the first and second storage locations to generate a data output responsive to the request, and to perform an error detection operation to generate an error signal that indicates whether the retrieved contents of the first and second storage locations are different.

公开(公告)号：US10951118B2

公开(公告)日：2021-03-16

申请号：US16877260

申请日：2020-05-18

Applicant: Apple Inc.

Inventor： Sanjay Pant ,  Fabio Gozzini ,  Hubert Attah ,  Jonathan F. Bolus ,  Wenxun Huang

IPC: H02M3/158 ,  H02M1/12 ,  H02M3/157 ,  G06F1/3203 ,  H03M1/12

Abstract: A voltage regulator circuit included in a computer system may include multiple phase circuits each coupled to a regulated power supply node via a corresponding inductor. The phase circuits may modify a voltage level of the regulated power supply node using respective control signals generated by a digital control circuit that processes multiple data bits. An analog-to-digital converter circuit may compare the voltage level of the regulated power supply node to multiple reference voltage levels and sample the resultant comparisons to generate the multiple data bits.

公开(公告)号：US10658931B1

公开(公告)日：2020-05-19

申请号：US16387316

申请日：2019-04-17

Applicant: Apple Inc.

Inventor： Sanjay Pant ,  Fabio Gozzini ,  Hubert Attah ,  Jonathan F. Bolus ,  Wenxun Huang

IPC: H02M3/158 ,  H02M1/12 ,  H02M3/157 ,  G06F1/3203 ,  H03M1/12

Abstract: A voltage regulator circuit included in a computer system may include multiple phase circuits each coupled to a regulated power supply node via a corresponding inductor. The phase circuits may modify a voltage level of the regulated power supply node using respective control signals generated by a digital control circuit that processes multiple data bits. An analog-to-digital converter circuit may compare the voltage level of the regulated power supply node to multiple reference voltage levels and sample the resultant comparisons to generate the multiple data bits.

公开(公告)号：US20190273503A1

公开(公告)日：2019-09-05

申请号：US16298803

申请日：2019-03-11

Applicant: Apple Inc.

Inventor： Brian S. Leibowitz ,  Jared L. Zerbe ,  Sanjay Pant

IPC: H03L7/093 ,  H03B1/00 ,  H03L7/099 ,  H03L7/08 ,  H03L7/085

Abstract: Techniques are disclosed relating to rapidly downshifting the output frequency of an oscillator. In some embodiments, the oscillator is configured to operate in a closed-loop mode in which negative feedback is used to maintain a particular output frequency (e.g., in a phase-locked loop (PLL)). In some embodiments, the negative feedback loop is configured to maintain the output of the oscillator at a particular frequency based on a reference clock signal and the output of the oscillator. The nature of a negative feedback loop may render rapid frequency changes difficult, e.g., because of corrections by the loop. Therefore, in some embodiments, the loop is configured to switch to an open-loop mode in which a control input to the oscillator is fixed. In some embodiments, the loop switches to open-loop mode in response to a trigger signal and control circuitry forces the oscillator to a new target frequency.

公开(公告)号：US20190140539A1

公开(公告)日：2019-05-09

申请号：US16180782

申请日：2018-11-05

Applicant: Apple Inc.

Inventor： Sanjay Pant ,  Fabio Gozzini ,  Jay B. Fletcher ,  Shawn Searles

IPC: H02M3/158 ,  H02M1/08

Abstract: A system that includes a regulator unit is disclosed. The regulator unit includes first and second phase units whose outputs are coupled to through first and second coupled inductors, respectively, to a power supply node of a circuit block. The first phase unit may be configured to discharge, for a first period of time, the power supply node through the first inductor in response to determining a sense current is greater than a demand current. The operation of the second phase unit may follow that of the first phase unit after a second period of time has elapsed.

公开(公告)号：US10122275B2

公开(公告)日：2018-11-06

申请号：US15403255

申请日：2017-01-11

Applicant: Apple Inc.

Inventor： Sanjay Pant ,  Fabio Gozzini ,  Jay B. Fletcher ,  Shawn Searles

IPC: H02M3/158 ,  H02M1/08 ,  H02M1/00

Abstract: A system that includes a regulator unit is disclosed. The regulator unit includes first and second phase units whose outputs are coupled to through first and second coupled inductors, respectively, to a power supply node of a circuit block. The first phase unit may be configured to discharge, for a first period of time, the power supply node through the first inductor in response to determining a sense current is greater than a demand current. The operation of the second phase unit may follow that of the first phase unit after a second period of time has elapsed.

公开(公告)号：US20180083643A1

公开(公告)日：2018-03-22

申请号：US15419218

申请日：2017-01-30

Applicant: Apple Inc.

Inventor： Jared L. Zerbe ,  Brian S. Leibowitz ,  Sanjay Pant

IPC: H03L7/099 ,  G01R19/165

Abstract: Techniques are disclosed relating to detecting supply voltage events and performing corrective actions. In some embodiments, an apparatus includes sensor circuitry and control circuitry. In some embodiments, the sensor circuitry is configured to monitor supply voltage from a power supply and detect a load release event that includes an increase in the supply voltage that meets one or more pre-determined threshold parameters. In some embodiments, the control circuitry is configured to increase clock cycle time for operations performed by circuitry powered by the supply voltage during a time interval, wherein the time interval corresponds to ringing of the supply voltage that reduces the supply voltage and results from the load release event. In some embodiments, the disclosed techniques may reduce transients in supply voltage (which may avoid equipment damage and computing errors) and may allow for reduced voltage margins (which may reduce overall power consumption).