公开(公告)号：US12127069B2

公开(公告)日：2024-10-22

申请号：US17025519

申请日：2020-09-18

Applicant: Intel Corporation

Inventor： Francesc Guim Bernat ,  Kshitij Arun Doshi ,  Ned M. Smith ,  Ben McCahill ,  Miltiadis Filippou

IPC: H04W4/021 ,  H04L9/06 ,  H04W12/041 ,  H04W12/64

CPC classification number: H04W4/021 ,  H04L9/0643 ,  H04W12/041 ,  H04W12/64

Abstract: Methods, systems, and use cases for geofence-based edge service control and authentication are discussed, including an orchestration system with memory and at least one processing circuitry coupled to the memory. The processing circuitry is configured to perform operations to obtain, from a plurality of connectivity nodes providing edge services, physical location information, and resource availability information associated with each of the plurality of connectivity nodes. An edge-to-edge location graph (ELG) is generated based on the physical location information and the resource availability information, the ELG indicating a subset of the plurality of connectivity nodes that are available for executing a plurality of services associated with an edge workload. The connectivity nodes are provisioned with the ELG and a workflow execution plan to execute the plurality of services, the workflow execution plan including metadata with a geofence policy. The geofence policy specifies geofence restrictions associated with each of the plurality of services.

公开(公告)号：US12113853B2

公开(公告)日：2024-10-08

申请号：US17033370

申请日：2020-09-25

Applicant: Intel Corporation

Inventor： Francesc Guim Bernat ,  Andrew J. Herdrich ,  Kshitij Arun Doshi ,  Monica Kenguva ,  Ned M. Smith ,  Nilesh Jain ,  Brinda Ganesh ,  Rashmin Patel ,  Alexander Vul

IPC: H04L67/1012 ,  H04L41/5009 ,  H04L41/5019 ,  H04L67/01 ,  H04L67/1087

CPC classification number: H04L67/1012 ,  H04L41/5009 ,  H04L41/5019 ,  H04L67/01 ,  H04L67/1089

Abstract: Example methods, apparatus, and systems to manage quality of service with respect to service level agreements in a computing device are disclosed. An example apparatus includes a first mesh proxy assigned to a first platform-agnostic application, the first mesh proxy to generate a first resource request signal based on a first service level agreement requirement from the first platform-agnostic application; a second mesh proxy assigned to a second platform-agnostic application, the second mesh proxy to generate a second resource request signal based on a second service level agreement requirement from second platform-agnostic application; and a load balancer to allocate hardware resources for the first platform-agnostic application and the second platform-agnostic application based on the first resource request signal and the second resource request signal.

公开(公告)号：US12063280B2

公开(公告)日：2024-08-13

申请号：US18456102

申请日：2023-08-25

Applicant: Intel Corporation

Inventor： Rajesh Poornachandran ,  Vincent Zimmer ,  Subrata Banik ,  Marcos Carranza ,  Kshitij Arun Doshi ,  Francesc Guim Bernat ,  Karthik Kumar

IPC: H04L67/51 ,  H04L9/00 ,  H04L9/32 ,  H04L41/5009 ,  H04L67/562

CPC classification number: H04L67/51 ,  H04L9/3278 ,  H04L41/5009 ,  H04L67/562 ,  H04L9/50

Abstract: An apparatus to facilitate provenance audit trails for microservices architectures is disclosed. The apparatus includes one or more processors to obtain provenance metadata for a microservice from a local blockchain of provenance metadata maintained for the hardware resource executing a task performed by the microservice, the provenance metadata comprising identification of the microservice, operating state of at least one of a hardware resource or a software resource used to execute the microservice and the task, and an operating state of a sidecar of the microservice during the task; access one or more policies established for the microservice; analyze the provenance metadata with respect to the one or more policies to identify if there is a violation of the one or more policies; and generate one or more evaluation metrics based on whether the violation of the one or more policies is identified.

公开(公告)号：US12058119B2

公开(公告)日：2024-08-06

申请号：US17127852

申请日：2020-12-18

Applicant: Intel Corporation

Inventor： Kshitij Arun Doshi ,  Francesc Guim Bernat ,  Kapil Sood ,  Tarun Viswanathan ,  Ned M. Smith

IPC: H04L9/40 ,  G06N7/01

CPC classification number: H04L63/0807 ,  G06N7/01 ,  H04L63/102 ,  H04L63/105 ,  H04L63/18

Abstract: Systems and techniques for automatic escalation of trust credentials are described herein. Requestor data may be received that describes workloads of a requestor. A set of trust credentials may be determined by using an escalation prediction model to evaluate the requestor data. The multi-access token may be assembled from the set of trust credentials. The multi-access token may be transmitted to an information provider to fulfill a request of a requestor.

公开(公告)号：US12039033B2

公开(公告)日：2024-07-16

申请号：US17696226

申请日：2022-03-16

Applicant: Intel Corporation

Inventor： Kshitij Arun Doshi

IPC: H04L29/06 ,  G06F21/52

CPC classification number: G06F21/52 ,  G06F2221/033

Abstract: Techniques for borrow checking in hardware are described. The technology includes a memory to store a plurality of allocated objects, an allocated object referenced by a pointer; and a processor to execute a join instruction to create a group of pointers, by creating a group record for the group referenced by a group pointer and setting a group bit and ownership identifier (ID) of pointers of the group; and execute a transfer group ownership instruction to transfer ownership of the group, including pointers of the group, by verifying validity of the group and setting the ownership ID of pointers of the group when the group is valid.

公开(公告)号：US20240152460A1

公开(公告)日：2024-05-09

申请号：US18545933

申请日：2023-12-19

Applicant: Intel Corporation

Inventor： John J. Browne ,  Kshitij Arun Doshi ,  Thijs Metsch ,  Francesc Guim Bernat ,  Adrian Hoban

IPC: G06F12/0842

CPC classification number: G06F12/0842

Abstract: An example disclosed apparatus comprises a trigger monitor to detect an event satisfying a cache scrape trigger rule during execution of a workload, and a cache scraper to scrape cache data from cache in hardware during the execution of the workload.

公开(公告)号：US11909841B2

公开(公告)日：2024-02-20

申请号：US16887087

申请日：2020-05-29

Applicant: Intel Corporation

Inventor： Francesc Guim Bernat ,  Kshitij Arun Doshi ,  Kenneth Shoemaker ,  Vinodh Gopal ,  Ned M. Smith

IPC: H04L29/08 ,  H04L67/56 ,  H04L49/00 ,  H04L47/80 ,  H04L49/90 ,  H04L49/109

CPC classification number: H04L67/56 ,  H04L47/805 ,  H04L49/109 ,  H04L49/3018 ,  H04L49/9068

Abstract: In one embodiment, a method includes: receiving, in an edge platform, a plurality of messages from a plurality of edge devices coupled to the edge platform, the plurality of messages comprising metadata including priority information and granularity information; extracting at least the priority information from the plurality of messages; storing the plurality of messages in entries of a pending request queue according to the priority information; selecting a first message stored in the pending request queue for delivery to a destination circuit; and sending a message header for the first message to the destination circuit via at least one interface circuit, the message header including the priority information, and thereafter sending a plurality of packets including payload information of the first message to the destination circuit via the at least one interface circuit. Other embodiments are described and claimed.

公开(公告)号：US20240031219A1

公开(公告)日：2024-01-25

申请号：US18478514

申请日：2023-09-29

Applicant: Intel Corporation

Inventor： John J. Browne ,  Kshitij Arun Doshi ,  Francesc Guim Bernat ,  Adrian Hoban ,  Mats Agerstam ,  Shekar Ramachandran ,  Thijs Metsch ,  Timothy Verrall ,  Ciara Loftus ,  Emma Collins ,  Krzysztof Kepka ,  Pawel Zak ,  Aibhne Breathnach ,  Ivens Zambrano ,  Shanshu Yang

IPC: H04L41/0654 ,  H04L41/0806

CPC classification number: H04L41/0654 ,  H04L41/0806

Abstract: Methods, apparatus, and systems are disclosed for mapping active assurance intents to resource orchestration and life cycle management. An example apparatus disclosed herein is to reserve a probe on a compute device in a cluster of compute devices based on a request to satisfy a resource availability criterion associated with a resource of the cluster, apply a risk mitigation operation based on the resource availability criterion before deployment of a workload to the cluster, and monitor whether the criterion is satisfied based on data from the probe after deployment of the workload to the cluster.

公开(公告)号：US11870669B2

公开(公告)日：2024-01-09

申请号：US17556051

申请日：2021-12-20

Applicant: Intel Corporation

Inventor： Rajesh Poornachandran ,  Vincent Zimmer ,  Subrata Banik ,  Marcos Carranza ,  Kshitij Arun Doshi ,  Francesc Guim Bernat ,  Karthik Kumar

IPC: H04L43/0817 ,  H04L43/0894 ,  G06N20/00 ,  H04L41/5009 ,  H04L43/0864

CPC classification number: H04L43/0817 ,  G06N20/00 ,  H04L41/5009 ,  H04L43/0864 ,  H04L43/0894

Abstract: An apparatus to facilitate at-scale telemetry using interactive matrix for deterministic microservices performance is disclosed. The apparatus includes one or more processors to: receive user input comprising an objective or task corresponding to scheduling a microservice for a service, wherein the objective or task may include QoS, SLO, ML feedback; identify interaction matrix components in an interaction matrix that match the objective or tasks for the microservice; identify knowledgebase components in knowledgebase that match the objective or tasks for the microservice; and determine a scheduling operation for the microservice, the scheduling operation to deploy the microservice in a configuration that is in accordance with the objective or task, wherein the configuration comprises a set of hardware devices and microservice interaction points determined based on the interaction matrix components and the knowledgebase components.

公开(公告)号：US11818106B2

公开(公告)日：2023-11-14

申请号：US17403549

申请日：2021-08-16

Applicant: Intel Corporation

Inventor： Kshitij Arun Doshi ,  Francesc Guim Bernat ,  Suraj Prabhakaran

IPC: H04L9/40 ,  G06N3/08 ,  G06F21/14 ,  G06F21/62 ,  H04W12/02 ,  H04L67/10 ,  G06N3/045 ,  G06N3/04

CPC classification number: H04L63/0428 ,  G06F21/14 ,  G06F21/6245 ,  G06N3/045 ,  G06N3/08 ,  H04L67/10 ,  H04W12/02 ,  G06N3/04

Abstract: Systems and techniques for AI model and data camouflaging techniques for cloud edge are described herein. In an example, a neural network transformation system is adapted to receive, from a client, camouflaged input data, the camouflaged input data resulting from application of a first encoding transformation to raw input data. The neural network transformation system may be further adapted to use the camouflaged input data as input to a neural network model, the neural network model created using a training data set created by applying the first encoding transformation on training data. The neural network transformation system may be further adapted to receive a result from the neural network model and transmit output data to the client, the output data based on the result.