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    TECHNOLOGIES FOR DYNAMICALLY SELECTING RESOURCES FOR VIRTUAL SWITCHING
    1.
    发明申请
    TECHNOLOGIES FOR DYNAMICALLY SELECTING RESOURCES FOR VIRTUAL SWITCHING 审中-公开

    公开(公告)号：US20190044812A1

    公开(公告)日：2019-02-07

    申请号：US16131009

    申请日：2018-09-13

    Applicant: Intel Corporation

    Inventor： Ciara Loftus ,  Chris MacNamara ,  John J. Browne ,  Patrick Fleming ,  Tomasz Kantecki ,  John Barry ,  Patrick Connor

    IPC: H04L12/24 ,  H04L12/923 ,  H04L12/911 ,  H04L12/931 ,  G06F11/34

    Abstract: Technologies for dynamically selecting resources for virtual switching include a network appliance configured to identify a present demand on processing resources of the network appliance that are configured to process data associated with network packets received by the network appliance. Additionally, the network appliance is configured to determine a present capacity of one or more acceleration resources of the network appliance and determine a virtual switch operation mode based on the present demand and the present capacity of the acceleration resources, wherein the virtual switch operation mode indicates which of the acceleration resources are to be enabled. The network appliance is additionally configured to configure a virtual switch of the network appliance to operate as a function of the determined virtual switch operation mode and assign acceleration resources of the network appliance as a function of the determined virtual switch operation mode. Other embodiments are described herein.

    Techniques for network packet classification, transmission and receipt
    2.
    发明授权
    Techniques for network packet classification, transmission and receipt 有权

    公开(公告)号：US11487567B2

    公开(公告)日：2022-11-01

    申请号：US16181145

    申请日：2018-11-05

    Applicant: Intel Corporation

    Inventor： Ciara Loftus ,  Subarna Kar ,  Namakkal Venkatesan ,  Mark D. Gray

    IPC: H04L12/66 ,  G06F9/455 ,  H04L69/22 ,  H04L45/745 ,  H04L47/50 ,  H04L49/00

    Abstract: A virtual machine (VM) can provision a region of memory for a queue to receive packet header, packet payload, and/or descriptors from the network interface. A virtual switch can provide a routing rule to a network interface to route a received packet header, packet payload, and/or descriptors associated with the VM to the provisioned queue. A direct memory access (DMA) transfer operation can be used to copy the received packet header, packet payload, and/or descriptors associated with the VM from the network interface to the provisioned queue without copying the packet header or payload to an intermediate buffer and from the intermediate buffer to the provisioned queue. A DMA operation can be used to transfer a packet or its descriptor from the provisioned queue to the network interface for transmission.

    Technologies for buffering received network packet data
    3.
    发明授权
    Technologies for buffering received network packet data 有权

    公开(公告)号：US10601738B2

    公开(公告)日：2020-03-24

    申请号：US16024774

    申请日：2018-06-30

    Applicant: Intel Corporation

    Inventor： Bruce Richardson ,  Chris MacNamara ,  Patrick Fleming ,  Tomasz Kantecki ,  Ciara Loftus ,  John J. Browne ,  Patrick Connor

    IPC: H04L12/861 ,  H04L12/879

    Abstract: Technologies for buffering received network packet data include a compute device with a network interface controller (NIC) configured to determine a packet size of a network packet received by the NIC and identify a preferred buffer size between a small buffer and a large buffer. The NIC is further configured to select, from the descriptor, a buffer pointer based on the preferred buffer size, wherein the buffer pointer comprises one of a small buffer pointer corresponding to a first physical address in memory allocated to the small buffer or a large buffer pointer corresponding to a second physical address in memory allocated to the large buffer. Additionally, the NIC is configured to store at least a portion of the network packet in the memory based on the selected buffer pointer. Other embodiments are described herein.

    TECHNOLOGIES FOR USING A HARDWARE QUEUE MANAGER AS A VIRTUAL GUEST TO HOST NETWORKING INTERFACE
    6.
    发明申请
    TECHNOLOGIES FOR USING A HARDWARE QUEUE MANAGER AS A VIRTUAL GUEST TO HOST NETWORKING INTERFACE 审中-公开

    公开(公告)号：US20190044892A1

    公开(公告)日：2019-02-07

    申请号：US16144146

    申请日：2018-09-27

    Applicant: Intel Corporation

    Inventor： John Mangan ,  Niall D. McDonnell ,  Harry Van Haaren ,  Bruce Richardson ,  Ciara Loftus

    IPC: H04L12/883 ,  H04L12/935 ,  H04L12/931 ,  G06F9/455

    Abstract: Technologies for using a hardware queue manager as a virtual guest to host networking interface include a compute node configured to receive a pointer corresponding to each of one or more available receive buffers from a guest processor core of at least one processor of the compute node that has been allocated to a virtual guest managed by the compute node. The compute node is further configured to enqueue the received pointer of each of the one or more available receive buffers into an available buffer queue and facilitate access to the available receive buffers to at least a portion of a plurality of virtual switch processor cores. Each of the virtual switch processor cores comprises another processor core of the plurality of processor cores that has been allocated to a virtual switch of the compute node. Other embodiments are described herein.

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