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公开(公告)号:US20240118397A1
公开(公告)日:2024-04-11
申请号:US18390534
申请日:2023-12-20
Inventor: Neale Dutton , John Kevin Moore
IPC: G01S7/4865 , G01S17/10 , G01S17/89
CPC classification number: G01S7/4865 , G01S17/10 , G01S17/89
Abstract: In an embodiment, a method includes: receiving a first plurality of digital codes from a TDC; generating a coarse histogram from the first plurality of digital codes; detecting a peak coarse bin from the plurality of coarse bins; after receiving the first plurality of digital codes, receiving a second plurality of digital codes from the TDC; and generating a fine histogram from the second plurality of digital codes based on the detected peak coarse bin, where a fine histogram depth range is narrower than a coarse histogram depth range, where a lower fine histogram depth is lower or equal to a lower coarse peak depth, and where a higher fine histogram depth is higher or equal to a higher coarse peak depth.
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公开(公告)号:US11740334B2
公开(公告)日:2023-08-29
申请号:US16898600
申请日:2020-06-11
Inventor: Sarrah Moiz Patanwala , Bruce Rae , Neale Dutton
IPC: G01S7/4863 , G01S7/4865 , H03K3/037 , G01S17/89
CPC classification number: G01S7/4863 , G01S7/4865 , H03K3/037 , G01S17/89
Abstract: A combining network for an array of SPAD devices includes: synchronous sampling circuits, wherein each synchronous sampling circuit is coupled to an output of a corresponding SPAD device and is configured to generate a pulse or an edge each time an event is detected; and a summation circuit coupled to an output of each of the synchronous sampling circuits and configured to count a number of pulses or edges to generate a binary output value.
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公开(公告)号:US11644573B2
公开(公告)日:2023-05-09
申请号:US17091153
申请日:2020-11-06
Inventor: John Kevin Moore , Neale Dutton , Jeffrey M. Raynor
IPC: G01S17/26 , G01S7/4865 , G01S17/894 , G01S17/89 , G01C3/08 , G01S17/36
CPC classification number: G01S17/26 , G01C3/08 , G01S7/4865 , G01S17/36 , G01S17/89 , G01S17/894
Abstract: A distance from an apparatus to at least one object is determined by generating a first signal and generating light modulated by the first signal to be emitted from the apparatus. Light reflected by the at least one object is detected using a Time-of-flight detector array, wherein each array element of the Time-of-flight detector array generates an output signal from a series of photon counts over a number of consecutive non-overlapping time periods. The output signals are compared to the first signal to determine at least one signal phase difference. From this at least one signal phase difference a distance from the apparatus to the at least one object is determined.
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公开(公告)号:US11543526B2
公开(公告)日:2023-01-03
申请号:US16896725
申请日:2020-06-09
Inventor: Neale Dutton , Christopher Townsend
Abstract: Disclosed herein is a time of flight sensing module that includes a reflected laser light detector formed on a printed circuit board, and a plurality of laser modules positioned about a periphery of the reflected laser light detector. Each laser module includes an interposer substrate vertically spaced apart from the printed circuit board, at least one laser diode carried by the interposer substrate, and a diffuser spaced apart from the interposer substrate and over the at least one laser diode. A lens may be positioned over the reflected laser light detector, and the plurality of laser modules are positioned about the periphery of the lens.
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公开(公告)号:US11525904B2
公开(公告)日:2022-12-13
申请号:US16661119
申请日:2019-10-23
Inventor: John Kevin Moore , Neale Dutton
IPC: G01C3/08 , G01S7/4913 , G01S17/32 , G01S7/48
Abstract: A time-of-flight ranging system disclosed herein includes a receiver asserting a photon received signal in response to detection of light that has reflected off a target and returned to the time-of-flight ranging system. A first latch circuit has first and second data inputs receiving a first pair of differential timing references, the first latch circuit latching data values at its first and second data inputs to first and second data outputs based upon assertion of the photon received signal. A first counter counts latching events of the first latch circuit during which the first data output is asserted, and a second counter counts latching events of the first latch circuit during which the second data output is asserted. Processing circuitry determines distance to the target based upon counted latching events output from the first and second counters.
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公开(公告)号:US20220316943A1
公开(公告)日:2022-10-06
申请号:US17838745
申请日:2022-06-13
Inventor: Neale Dutton , John Kevin Moore
Abstract: An optical sensor includes at least one photodetector configured to be reverse biased at a voltage exceeding a breakdown voltage by an excess bias voltage. At least one control unit is configured to adjust the reverse bias of the at least one photodetector. A method of operating an optical sensor is also disclosed.
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公开(公告)号:US20210382152A1
公开(公告)日:2021-12-09
申请号:US16895477
申请日:2020-06-08
Inventor: Neale Dutton , John Kevin Moore
IPC: G01S7/4863 , G01S17/89
Abstract: A ToF sensor includes an array of pixels having first and second subsets of pixels, first and second pluralities of TDCs, a routing bus having first and second pluralities of bus drivers, and a controller configured to: when the first subset of pixels is active and the second subset of pixels is not active, control the first plurality of bus drivers to route events from half of the pixels of the first subset to the first plurality of TDCs and control the first and second pluralities of bus drivers to route events from the other half of the pixels of the first subset to the second plurality of TDCs, and when the first subset of pixels is not active and the second subset of pixels is active, control the first plurality of bus drivers to route events from the second subset of pixels to the first plurality of TDCs.
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公开(公告)号:US20210133992A1
公开(公告)日:2021-05-06
申请号:US17074238
申请日:2020-10-19
Applicant: STMICROELECTRONICS (RESEARCH & DEVELOPMENT) LIMITED , STMicroelectronics (Grenoble 2) SAS
Inventor: Ivelina Hristova , Pascal Mellot , Neale Dutton
Abstract: A depth map sensor includes a first array of first pixels, each first pixel having a first photodetector associated with a pixel circuit that comprises a plurality of first bins for accumulating events. A clock source is configured to generate a plurality of phase-shifted clock signals. A first circuit has a plurality of first output lines coupled to the first array of first pixels. The first circuit is configured to receive the plurality of phase-shifted clock signals. The first circuit includes a first block and a second block. The first block is configured to propagate the plurality of phase-shifted clock signals to the second block during a first period determined by a first enable signal and the second block configured to select to which of the plurality of first output lines each of the plurality of phase-shifted clock signals is applied.
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公开(公告)号:US20210126708A1
公开(公告)日:2021-04-29
申请号:US16730036
申请日:2019-12-30
Inventor: Ellen Couper , Neale Dutton , Alexios Alexandropoulos
IPC: H04B10/116 , H04B10/70 , H04B10/50 , H04B10/66
Abstract: A method of processing a visible light communication (VLC) signal using a single-photon avalanche diode (SPAD) includes detecting photons of a VLC signal at a SPAD detector, counting the photons detected by the SPAD detector to generate a combined VLC signal comprising a data signal and an ambient signal, extracting the ambient signal from the combined VLC signal, subtracting the ambient signal from the combined VLC signal to generate the data signal, and outputting the data signal as a bitstream.
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公开(公告)号:US10992384B1
公开(公告)日:2021-04-27
申请号:US16730036
申请日:2019-12-30
Inventor: Ellen Couper , Neale Dutton , Alexios Alexandropoulos
IPC: H04B10/00 , H04B10/116 , H04B10/66 , H04B10/50 , H04B10/70
Abstract: A method of processing a visible light communication (VLC) signal using a single-photon avalanche diode (SPAD) includes detecting photons of a VLC signal at a SPAD detector, counting the photons detected by the SPAD detector to generate a combined VLC signal comprising a data signal and an ambient signal, extracting the ambient signal from the combined VLC signal, subtracting the ambient signal from the combined VLC signal to generate the data signal, and outputting the data signal as a bitstream.
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