公开(公告)号：US20230138802A1

公开(公告)日：2023-05-04

申请号：US18091432

申请日：2022-12-30

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hideki UOCHI ,  Koichiro KAMATA

IPC: G11C13/00 ,  G11C11/404 ,  H01L29/24 ,  H10B69/00 ,  H01L29/16 ,  H01L29/49

Abstract: Disclosed is a semiconductor device having a memory cell which comprises a transistor having a control gate and a storage gate. The storage gate comprises an oxide semiconductor and is able to be a conductor and an insulator depending on the potential of the storage gate and the potential of the control gate. Data is written by setting the potential of the control gate to allow the storage gate to be a conductor, supplying a potential of data to be stored to the storage gate, and setting the potential of the control gate to allow the storage gate to be an insulator. Data is read by supplying a potential for reading to a read signal line connected to one of a source and a drain of the transistor and detecting the change in potential of a bit line connected to the other of the source and the drain.

公开(公告)号：US20230005528A1

公开(公告)日：2023-01-05

申请号：US17940065

申请日：2022-09-08

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Takahiko ISHIZU ,  Toshihiko SAITO ,  Hideki UOCHI ,  Shunpei YAMAZAKI

IPC: G11C11/419 ,  G11C11/409 ,  H01L29/04 ,  H01L29/786

Abstract: A novel memory device is provided. The memory device includes a plurality of memory cells, and one memory cell includes a first transistor and a second transistor. One of a source and a drain of the first transistor is electrically connected to a gate of the second transistor through a node SN. Data written through the first transistor is retained at the node SN. When an OS transistor is used as the first transistor, formation of a storage capacitor is not needed. A region with a low dielectric constant is provided outside the memory cell, whereby noise from the outside is reduced and stable operation is achieved.

公开(公告)号：US20220037475A1

公开(公告)日：2022-02-03

申请号：US17279735

申请日：2019-10-22

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Kouhei TOYOTAKA ,  Hideki UOCHI

IPC: H01L29/26 ,  H01L27/088 ,  H02M7/10 ,  H01L27/06

Abstract: A semiconductor device and the like with low power consumption are provided. In a semiconductor device including an electrostatic actuator group, an OS transistor and a capacitor are provided in each electrostatic actuator, and a power supply voltage supplied from the outside is boosted in each electrostatic actuator. The use of the OS transistor can retain the boosted voltage for a long period even after the supply of the power supply voltage is stopped. The use of the OS transistor can miniaturize the capacitor.

公开(公告)号：US20220020841A1

公开(公告)日：2022-01-20

申请号：US17488376

申请日：2021-09-29

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Kengo AKIMOTO ,  Shigeki KOMORI ,  Hideki UOCHI ,  Rihito WADA ,  Yoko CHIBA

IPC: H01L27/32 ,  H01L29/786 ,  H01L27/12

Abstract: A display device includes a pixel portion in which a pixel is arranged in a matrix, the pixel including an inverted staggered thin film transistor having a combination of at least two kinds of oxide semiconductor layers with different amounts of oxygen and having a channel protective layer over a semiconductor layer to be a channel formation region overlapping a gate electrode layer and a pixel electrode layer electrically connected to the inverted staggered thin film transistor. In the periphery of the pixel portion in this display device, a pad portion including a conductive layer made of the same material as the pixel electrode layer is provided. In addition, the conductive layer is electrically connected to a common electrode layer formed on a counter substrate.

公开(公告)号：US20190081031A1

公开(公告)日：2019-03-14

申请号：US16189396

申请日：2018-11-13

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Kengo AKIMOTO ,  Shigeki KOMORI ,  Hideki UOCHI ,  Tomoya FUTAMURA ,  Takahiro KASAHARA

IPC: H01L27/02 ,  H01L27/12 ,  H01L29/786

Abstract: A protective circuit includes a non-linear element which includes a gate electrode, a gate insulating layer covering the gate electrode, a first oxide semiconductor layer overlapping with the gate electrode over the gate insulating layer, a channel protective layer overlapping with a channel formation region of the first oxide semiconductor layer, and a pair of a first wiring layer and a second wiring layer whose end portions overlap with the gate electrode over the channel protective layer and in which a conductive layer and a second oxide semiconductor layer are stacked. Over the gate insulating layer, oxide semiconductor layers with different properties are bonded to each other, whereby stable operation can be performed as compared with Schottky junction. Thus, the junction leakage can be reduced and the characteristics of the non-linear element can be improved.

公开(公告)号：US20180224961A1

公开(公告)日：2018-08-09

申请号：US15870141

申请日：2018-01-12

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Roh YAMAMOTO ,  Hideki UOCHI

IPC: G06F3/044 ,  G09G3/36 ,  G09G3/20

CPC classification number: G06F3/044 ,  G09G3/2096 ,  G09G3/36 ,  G09G2300/0426 ,  G09G2300/0452 ,  G09G2300/0809 ,  G09G2300/0842 ,  G09G2310/0291 ,  G09G2310/08 ,  G09G2320/0613 ,  G09G2320/103 ,  G09G2330/021 ,  G09G2370/08 ,  G09G2370/14 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78696

Abstract: A display device with less power consumption. The display device operates in a still image display period and a moving image display period, and includes a receiving circuit having a function of receiving an image signal, a driver circuit having a function of driving a display portion, and the display portion having a function of displaying an image. The display portion displays an image at a frame frequency of less than or equal to 1 Hz in the still image display period. The receiving circuit stops receiving an image signal in the still image display period. Switching from the still image display period to the moving image display period is accurately performed by an external signal.

公开(公告)号：US20170084754A1

公开(公告)日：2017-03-23

申请号：US15262660

申请日：2016-09-12

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yutaka SHIONOIRI ,  Shuhei NAGATSUKA ,  Hideki UOCHI

IPC: H01L29/786 ,  H01L21/78 ,  H01L21/48 ,  H01L23/31 ,  H01L23/544 ,  H01L21/66 ,  H01L23/495 ,  H01L27/12 ,  H01L21/56

CPC classification number: H01L29/78648 ,  H01L21/4825 ,  H01L21/4842 ,  H01L21/565 ,  H01L21/78 ,  H01L22/14 ,  H01L23/3114 ,  H01L23/49513 ,  H01L23/4952 ,  H01L23/49555 ,  H01L23/544 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/3262 ,  H01L29/7869 ,  H01L2223/54486 ,  H03K19/00346 ,  H05B33/0815 ,  H05B33/089

Abstract: In a logic circuit including transistors with the same conductivity, a reduction in output voltage is prevented with use of at least three transistors and a capacitor. With use of an oxide semiconductor in a semiconductor layer of the transistor, a logic circuit with high output voltage and high withstand voltage is achieved. With use of the logic circuit, a semiconductor device with high output voltage and high withstand voltage is achieved.

公开(公告)号：US20170040409A1

公开(公告)日：2017-02-09

申请号：US15296270

申请日：2016-10-18

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Kengo AKIMOTO ,  Shigeki KOMORI ,  Hideki UOCHI ,  Rihito WADA ,  Yoko CHIBA

IPC: H01L27/32 ,  H01L29/786 ,  H01L27/12

CPC classification number: H01L27/3276 ,  H01L27/1225 ,  H01L27/3262 ,  H01L29/7869 ,  H01L51/5221

Abstract: A display device includes a pixel portion in which a pixel is arranged in a matrix, the pixel including an inverted staggered thin film transistor having a combination of at least two kinds of oxide semiconductor layers with different amounts of oxygen and having a channel protective layer over a semiconductor layer to be a channel formation region overlapping a gate electrode layer and a pixel electrode layer electrically connected to the inverted staggered thin film transistor. In the periphery of the pixel portion in this display device, a pad portion including a conductive layer made of the same material as the pixel electrode layer is provided. In addition, the conductive layer is electrically connected to a common electrode layer formed on a counter substrate.

Abstract translation: 显示装置包括其中像素以矩阵形式布置的像素部分，该像素包括具有不同量的氧并且具有通道保护层的至少两种氧化物半导体层的组合的反交错薄膜晶体管 半导体层作为与栅电极层重叠的沟道形成区域和与反交错薄膜晶体管电连接的像素电极层。 在该显示装置的像素部的周围，设置由与像素电极层相同的材料构成的导电层的焊盘部。 另外，导电层与形成在对置基板上的公共电极层电连接。

公开(公告)号：US20160070386A1

公开(公告)日：2016-03-10

申请号：US14844344

申请日：2015-09-03

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Roh YAMAMOTO ,  Hideki UOCHI

IPC: G06F3/044 ,  G09G3/36

CPC classification number: G06F3/044 ,  G09G3/2096 ,  G09G3/36 ,  G09G2300/0426 ,  G09G2300/0452 ,  G09G2300/0809 ,  G09G2300/0842 ,  G09G2310/0291 ,  G09G2310/08 ,  G09G2320/0613 ,  G09G2320/103 ,  G09G2330/021 ,  G09G2370/08 ,  G09G2370/14

Abstract: A display device with less power consumption. The display device operates in a still image display period and a moving image display period, and includes a receiving circuit having a function of receiving an image signal, a driver circuit having a function of driving a display portion, and the display portion having a function of displaying an image. The display portion displays an image at a frame frequency of less than or equal to 1 Hz in the still image display period. The receiving circuit stops receiving an image signal in the still image display period. Switching from the still image display period to the moving image display period is accurately performed by an external signal.

Abstract translation: 具有较少功耗的显示设备。 显示装置在静止图像显示周期和运动图像显示周期中操作，并且包括具有接收图像信号的功能的接收电路，具有驱动显示部分的功能的驱动器电路以及具有功能的显示部分 显示图像。 显示部分在静止图像显示周期中以小于或等于1Hz的帧频率显示图像。 接收电路在静止图像显示周期中停止接收图像信号。 通过外部信号精确地执行从静止图像显示周期到运动图像显示周期的切换。

公开(公告)号：US20140264329A1

公开(公告)日：2014-09-18

申请号：US14290216

申请日：2014-05-29

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Kengo AKIMOTO ,  Shigeki KOMORI ,  Hideki UOCHI ,  Tomoya FUTAMURA ,  Takahiro KASAHARA

IPC: H01L29/786 ,  H01L29/66

CPC classification number: H01L27/1214 ,  G02F1/13624 ,  G02F1/1368 ,  H01L27/1225 ,  H01L27/124 ,  H01L29/66742 ,  H01L29/7869 ,  H01L29/78693

Abstract: A protective circuit includes a non-linear element, which includes a gate electrode, a gate insulating layer covering the gate electrode, a pair of first and second wiring layers whose end portions overlap with the gate electrode over the gate insulating layer and in which a second oxide semiconductor layer and a conductive layer are stacked, and a first oxide semiconductor layer which overlaps with at least the gate electrode and which is in contact with the gate insulating layer, side face portions and part of top face portions of the conductive layer and side face portions of the second oxide semiconductor layer in the first wiring layer and the second wiring layer. Over the gate insulating layer, oxide semiconductor layers with different properties are bonded to each other, whereby stable operation can be performed as compared with Schottky junction. Thus, the junction leakage can be decreased and the characteristics of the non-linear element can be improved.

Abstract translation: 保护电路包括非线性元件，其包括栅电极，覆盖栅电极的栅极绝缘层，一对第一和第二布线层，其端部与栅极绝缘层上的栅电极重叠，并且其中 层叠第二氧化物半导体层和导电层，以及与至少栅电极重叠并与栅极绝缘层接触的第一氧化物半导体层，导电层的侧面部和顶面部的一部分，以及 在第一布线层和第二布线层中的第二氧化物半导体层的侧面部分。 在栅极绝缘层上，具有不同性质的氧化物半导体层彼此结合，由此可以进行与肖特基结的稳定操作。 因此，可以降低结漏电，提高非线性元件的特性。