公开(公告)号：US10886590B2

公开(公告)日：2021-01-05

申请号：US16136109

申请日：2018-09-19

Applicant: Texas Instruments Incorporated

Inventor： Baher Haroun ,  Juan Alejandro Herbsommer ,  Gerd Schuppener ,  Swaminathan Sankaran

IPC: H01P5/08 ,  H01P11/00 ,  H01P3/16

Abstract: An interposer that acts as a buffer zone between a transceiver IC and a dielectric waveguide interconnect is used to establish two well defined reference planes that can be optimized independently. The interposer includes a block of material having a first interface region to interface with an antenna coupled to an integrated circuit (IC) and a second interface region to interface to the dielectric waveguide. An interface waveguide is formed by a defined region positioned within the block of material between the first interface region and the second interface region.

公开(公告)号：US20190109362A1

公开(公告)日：2019-04-11

申请号：US16136109

申请日：2018-09-19

Applicant: Texas Instruments Incorporated

Inventor： Baher Haroun ,  Juan Alejandro Herbsommer ,  Gerd Schuppener ,  Swaminathan Sankaran

IPC: H01P5/08 ,  H01P3/16 ,  H01P11/00

Abstract: An interposer that acts as a buffer zone between a transceiver IC and a dielectric waveguide interconnect is used to establish two well defined reference planes that can be optimized independently. The interposer includes a block of material having a first interface region to interface with an antenna coupled to an integrated circuit (IC) and a second interface region to interface to the dielectric waveguide. An interface waveguide is formed by a defined region positioned within the block of material between the first interface region and the second interface region.

公开(公告)号：US20170257087A1

公开(公告)日：2017-09-07

申请号：US15598339

申请日：2017-05-18

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Mohammad Elbadry ,  Robert Floyd Payne ,  Gerd Schuppener

IPC: H03K5/156 ,  H02M3/07

CPC classification number: H03K5/1565 ,  H02M3/07

Abstract: A duty cycle correction circuit includes a charge pump and a controller. The charge pump includes a current source, a first output, and a second output. The charge pump routes current from the current source to the first output during a positive portion of a clock, and routes current from the current source to the second output during a negative portion of the clock. The controller compares charge accumulated from the first output to charge accumulated from the second output over a plurality of clock cycles to determine which of the positive portion of the clock and the negative portion of the clock is longer. The controller also generates a digital value that indicates an amount of adjustment to apply to a duty cycle of the clock based on which of the positive portion of the clock and the negative portion of the clock is longer.

公开(公告)号：US09711837B2

公开(公告)日：2017-07-18

申请号：US13854959

申请日：2013-04-02

Applicant: Texas Instruments Incorporated

Inventor： Robert Floyd Payne ,  Juan Alejandro Herbsommer ,  Gerd Schuppener

IPC: H01P3/16 ,  H01P5/08 ,  G02B6/44 ,  H01P11/00 ,  H01P5/00 ,  H01Q1/50 ,  H01Q19/10 ,  H04B1/40 ,  H01Q19/30 ,  H01P3/12 ,  H01P5/107 ,  H01P5/18

CPC classification number: H01P3/16 ,  G02B6/4416 ,  H01L2223/6677 ,  H01L2224/16227 ,  H01L2224/73204 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01P3/121 ,  H01P3/165 ,  H01P5/00 ,  H01P5/087 ,  H01P5/107 ,  H01P5/184 ,  H01P11/001 ,  H01P11/002 ,  H01Q1/50 ,  H01Q19/108 ,  H01Q19/30 ,  H04B1/40 ,  Y10T29/49016 ,  Y10T29/49826

Abstract: A multichannel dielectric wave guide includes a set of dielectric core members that have a length and a cross section shape that is approximately rectangular, The core members have a first dielectric constant value. A cladding surrounds the set of dielectric core members and has a second dielectric constant value that is lower than the first dielectric constant.

公开(公告)号：US20170126219A1

公开(公告)日：2017-05-04

申请号：US14927949

申请日：2015-10-30

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Mohammad ELBADRY ,  Robert Floyd PAYNE ,  Gerd Schuppener

IPC: H03K5/156 ,  H02M3/07

CPC classification number: H03K5/1565 ,  H02M3/07

Abstract: A duty cycle correction circuit includes a charge pump and a controller. The charge pump includes a current source, a first output, and a second output. The charge pump routes current from the current source to the first output during a positive portion of a clock, and routes current from the current source to the second output during a negative portion of the clock. The controller compares charge accumulated from the first output to charge accumulated from the second output over a plurality of clock cycles to determine which of the positive portion of the clock and the negative portion of the clock is longer. The controller also generates a digital value that indicates an amount of adjustment to apply to a duty cycle of the clock based on which of the positive portion of the clock and the negative portion of the clock is longer.

公开(公告)号：US09570788B2

公开(公告)日：2017-02-14

申请号：US14754401

申请日：2015-06-29

Applicant: Texas Instruments Incorporated

Inventor： Robert Floyd Payne ,  Juan Alejandro Herbsommer ,  Gerd Schuppener

IPC: H01P3/16 ,  H01P5/08 ,  G02B6/44 ,  H01P11/00 ,  H01P5/00 ,  H01Q1/50 ,  H01Q19/10 ,  H04B1/40 ,  H01Q19/30 ,  H01P3/12 ,  H01P5/107 ,  H01P5/18

CPC classification number: H01P3/16 ,  G02B6/4416 ,  H01L2223/6677 ,  H01L2224/16227 ,  H01L2224/73204 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01P3/121 ,  H01P3/165 ,  H01P5/00 ,  H01P5/087 ,  H01P5/107 ,  H01P5/184 ,  H01P11/001 ,  H01P11/002 ,  H01Q1/50 ,  H01Q19/108 ,  H01Q19/30 ,  H04B1/40 ,  Y10T29/49016 ,  Y10T29/49826

Abstract: A communication cable includes one or more conductive elements surrounded by a dielectric sheath. The sheath member has a first dielectric constant value. A dielectric core member is placed longitudinally adjacent to and in contact with an outer surface of the sheath member. The core member has a second dielectric constant value that is higher than the first dielectric constant value. A cladding surrounds the sheath member and the dielectric core member. The cladding has a third dielectric constant value that is lower than the second dielectric constant value. A dielectric wave guide is formed by the dielectric core member surrounded by the sheath and the cladding.

Abstract translation: 通信电缆包括由电介质护套包围的一个或多个导电元件。 护套构件具有第一介电常数值。 电介质芯构件被纵向地邻近鞘构件的外表面并与其接触。 芯构件具有比第一介电常数值高的第二介电常数值。 包层围绕护套构件和电介质芯构件。 包层具有低于第二介电常数值的第三介电常数值。 电介质波导由被护套和包层包围的介质芯构件形成。

公开(公告)号：US09373878B2

公开(公告)日：2016-06-21

申请号：US13854954

申请日：2013-04-01

Applicant: Texas Instruments Incorporated

Inventor： Gerd Schuppener ,  Juan Alejandro Herbsommer ,  Robert Floyd Payne

IPC: H01P3/16 ,  H01P5/08 ,  G02B6/44 ,  H01P11/00 ,  H01P5/00 ,  H01Q1/50 ,  H01Q19/10 ,  H04B1/40 ,  H01Q19/30 ,  H01P3/12 ,  H01P5/107

CPC classification number: H01P3/16 ,  G02B6/4416 ,  H01L2223/6677 ,  H01L2224/16227 ,  H01L2224/73204 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01P3/121 ,  H01P3/165 ,  H01P5/00 ,  H01P5/087 ,  H01P5/107 ,  H01P5/184 ,  H01P11/001 ,  H01P11/002 ,  H01Q1/50 ,  H01Q19/108 ,  H01Q19/30 ,  H04B1/40 ,  Y10T29/49016 ,  Y10T29/49826

Abstract: A communication cable includes a dielectric wave guide (DWG) that has a dielectric core member that has a first dielectric constant value and a cladding surrounding the dielectric core member that has a second dielectric constant value that is lower than the first dielectric constant. An RJ45 compatible connector is attached to a mating end of the DWG. The RJ45 connector is configured to retain a complimentary coupling mechanism on a mating end of a second DWG.

Abstract translation: 通信电缆包括具有第一介电常数值的介质芯构件和围绕介电芯构件的包层的电介质波导（DWG），其具有低于第一介电常数的第二介电常数值。 RJ45兼容连接器连接到DWG的配对端。 RJ45连接器被配置为在第二DWG的配合端上保持互补的耦合机构。

公开(公告)号：US09312591B2

公开(公告)日：2016-04-12

申请号：US13854951

申请日：2013-04-01

Applicant: Texas Instruments Incorporated

Inventor： Juan Alejandro Herbsommer ,  Gerd Schuppener ,  Robert Floyd Payne

IPC: H01P1/04 ,  H01P3/16 ,  H01P5/08 ,  G02B6/44 ,  H01P11/00 ,  H01P5/00 ,  H01Q1/50 ,  H01Q19/10 ,  H04B1/40 ,  H01Q19/30 ,  H01P3/12 ,  H01P5/107

CPC classification number: H01P3/16 ,  G02B6/4416 ,  H01L2223/6677 ,  H01L2224/16227 ,  H01L2224/73204 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01P3/121 ,  H01P3/165 ,  H01P5/00 ,  H01P5/087 ,  H01P5/107 ,  H01P5/184 ,  H01P11/001 ,  H01P11/002 ,  H01Q1/50 ,  H01Q19/108 ,  H01Q19/30 ,  H04B1/40 ,  Y10T29/49016 ,  Y10T29/49826

Abstract: A dielectric wave guide (DWG) has a longitudinal dielectric core member. The core member has a first dielectric constant value. A cladding surrounds the dielectric core member and has a second dielectric constant value that is lower than the first dielectric constant. A portion of the DWG is configured as a corner having a radius. A conductive layer formed on an outer radius of the corner.

Abstract translation: 电介质波导（DWG）具有纵向介质芯构件。 芯构件具有第一介电常数值。 包层围绕介质芯构件并具有低于第一介电常数的第二介电常数值。 DWG的一部分被配置为具有半径的角。 形成在拐角的外半径上的导电层。

公开(公告)号：US09219296B2

公开(公告)日：2015-12-22

申请号：US13854947

申请日：2013-04-01

Applicant: Texas Instruments Incorporated

Inventor： Juan Alejandro Herbsommer ,  Robert Floyd Payne ,  Gerd Schuppener ,  Baher Haroun

IPC: H01P5/107 ,  H01P3/16 ,  H01P5/08 ,  G02B6/44 ,  H01P11/00 ,  H01P5/00 ,  H01Q1/50 ,  H01Q19/10 ,  H04B1/40 ,  H01Q19/30 ,  H01P3/12

CPC classification number: H01P3/16 ,  G02B6/4416 ,  H01L2223/6677 ,  H01L2224/16227 ,  H01L2224/73204 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01P3/121 ,  H01P3/165 ,  H01P5/00 ,  H01P5/087 ,  H01P5/107 ,  H01P5/184 ,  H01P11/001 ,  H01P11/002 ,  H01Q1/50 ,  H01Q19/108 ,  H01Q19/30 ,  H04B1/40 ,  Y10T29/49016 ,  Y10T29/49826

Abstract: A metallic waveguide is mounted on a multilayer substrate. The metallic waveguide has an open end formed by a top, bottom and sides configured to receive a core member of a dielectric waveguide, and an opposite tapered end formed by declining the top of the metallic waveguide past the bottom of the metallic waveguide and down to contact the multilayer substrate. A pinnacle of the tapered end is coupled to the ground plane element, and the bottom side of the metallic waveguide is in contact with the multiplayer substrate and coupled to the microstrip line.

Abstract translation: 金属波导安装在多层基板上。 金属波导具有由顶部，底部和侧面形成的开口端，该开口端被配置为容纳电介质波导的芯构件，并且相反的锥形端通过使金属波导的顶部通过金属波导的底部下降到 接触多层基板。 锥形末端的顶点耦合到接地平面元件，并且金属波导的底侧与多人基板接触并耦合到微带线。

公开(公告)号：US20140287702A1

公开(公告)日：2014-09-25

申请号：US13854957

申请日：2013-04-02

Applicant: Texas Instruments Incorporated

Inventor： Gerd Schuppener ,  Juan Alejandro Herbsommer ,  Robert Floyd Payne

IPC: H01Q19/30 ,  H04B1/40 ,  H01P5/08

CPC classification number: H01P3/16 ,  G02B6/4416 ,  H01L2223/6677 ,  H01L2224/16227 ,  H01L2224/73204 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01P3/121 ,  H01P3/165 ,  H01P5/00 ,  H01P5/087 ,  H01P5/107 ,  H01P5/184 ,  H01P11/001 ,  H01P11/002 ,  H01Q1/50 ,  H01Q19/108 ,  H01Q19/30 ,  H04B1/40 ,  Y10T29/49016 ,  Y10T29/49826

Abstract: A system includes an electronic device coupled to a mating end of a dielectric wave guide (DWG). The electronic device has a multilayer substrate that has an interface surface configured for interfacing to the mating end of the DWG. A conductive layer is etched to form a dipole antenna disposed adjacent the interface surface. A reflector structure is formed in the substrate adjacent the dipole antenna opposite from the interface surface. A set of director elements is embedded in the mating end of the DWG. Specific spacing is maintained between the dipole antenna and the set of director elements.

Abstract translation: 一种系统包括耦合到电介质波导（DWG）的配合端的电子装置。 电子设备具有多层基板，该多层基板具有被配置为与DWG的配合端对接的界面。 蚀刻导电层以形成邻近界面表面设置的偶极天线。 反射器结构形成在与界面表面相对的偶极子天线附近的衬底中。 一组指导元素嵌入在DWG的配对端。 在偶极天线和导向器元件组之间保持特定的间隔。