公开(公告)号：US20040207752A1

公开(公告)日：2004-10-21

申请号：US10413308

申请日：2003-04-15

Applicant: SILICON INTEGRATED SYSTEMS CORP.

Inventor： Wen-Kuo Lin ,  Jong-Ho Yan

IPC: H04N005/08 ,  H04N011/20

CPC classification number: H04N7/012 ,  H04N7/0112

Abstract: The invention relates to a method for detecting video frame types with median filtering, which proceeds a denoising step after caculating the comb factor of each pixel, to avoid incorrect judgment of the frame type resulting from excessive field difference and improve detection accuracy.

Abstract translation: 本发明涉及一种利用中值滤波检测视频帧类型的方法，在对每个像素的梳状因子进行了计算之后进行去噪步骤，以避免由于过大的场差引起的帧类型的错误判断，并提高了检测精度。

公开(公告)号：US20040189866A1

公开(公告)日：2004-09-30

申请号：US10396781

申请日：2003-03-26

Applicant: SILICON INTEGRATED SYSTEMS CORP.

Inventor： Wen-Kuo Lin ,  Chung-Yen Lu

IPC: H04N007/01

CPC classification number: H04N5/144 ,  H04N7/012 ,  H04N7/0137

Abstract: A method for motion pixel detection with a static counter map so as to correctly evaluate whether a missing pixel is in a static region or a non-static region, thereby reconstructing the missing pixel by an inter-field interpolation process or an intra-field interpolation process, respectively.

Abstract translation: 一种利用静态计数器映射图进行运动像素检测的方法，以便正确评估缺失像素是在静态区域还是非静态区域，从而通过场间插值处理或场内插值来重建缺失像素 过程。

公开(公告)号：US20040047435A1

公开(公告)日：2004-03-11

申请号：US10234519

申请日：2002-09-05

Applicant: Silicon Integrated Systems Corp.

Inventor： Hsiao-Lan Su

IPC: H04L027/06

CPC classification number: H04L25/025 ,  H04L25/0236 ,  H04L27/2647

Abstract: A channel estimator for use in wireless local area networks (WLAN's), characterized in that a channel estimation controller with a simplified recursive least square (RLS) algorithm and a data-reconstructor are employed to adjust the channel response in frequency domain during the delivery of a signal packet. Such adjustment is adaptively performed at anytime during the delivery of a signal packet so as to achieve fast convergence as well as accurate channel estimation.

Abstract translation: 一种在无线局域网（WLAN）中使用的信道估计器，其特征在于采用具有简化递归最小二乘法（RLS）算法的信道估计控制器和数据重构器，以在传送期间调整频域中的信道响应 信号包。 这样的调整在信号包传送期间的任何时间自适应地执行，以便实现快速收敛以及准确的信道估计。

公开(公告)号：US20040010329A1

公开(公告)日：2004-01-15

申请号：US10191223

申请日：2002-07-09

Applicant: Silicon Integrated Systems Corp.

Inventor： Chung-Hsien Lee ,  Hsin-Yi Huang

IPC: G06F017/00

CPC classification number: G10L19/16 ,  G10L19/0212

Abstract: A method for reducing buffer requirements in a digital audio decoder. Firstly, N samples that have to be decoded for an audio channel at this time are extracted from a sub-frame of a bitstream. A sub-block of K PCM samples is calculated at a time by performing an inverse transform on the N extracted samples, and then the N extracted samples are discarded. Note that the number of extracted samples is greater than or equal to the number of the PCM samples in a generated sub-block, i.e., NnullK. The above steps are repeated until one PCM output sub-frame of the audio channel is fully obtained.

Abstract translation: 一种用于减少数字音频解码器中的缓冲器要求的方法。 首先，从比特流的子帧中提取此时必须对音频信道进行解码的N个样本。 通过对N个提取的样本进行逆变换，一次计算K个PCM样本的子块，然后丢弃N个提取的样本。 注意，提取的样本的数量大于或等于所生成的子块中的PCM样本的数量，即N> = K。 重复上述步骤，直到完全获得音频通道的一个PCM输出子帧。

公开(公告)号：US20030141605A1

公开(公告)日：2003-07-31

申请号：US10191157

申请日：2002-07-09

Applicant: Silicon Integrated Systems Corp.

Inventor： Shyh-Dar Lee ,  Chen-Chiu Hsue

IPC: H01L023/544

CPC classification number: H01L23/544 ,  H01L2223/54406 ,  H01L2223/54413 ,  H01L2223/54493 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method of forming an identifying mark on a semiconductor wafer. The identifying mark, for example a bar code or a character of patterns or words, is formed on the side wall of the semiconductor wafer to avoid contamination and the creation of failure dies during the formation of the identifying mark.

Abstract translation: 一种在半导体晶片上形成识别标记的方法。 在半导体晶片的侧壁上形成识别标记，例如条形码或图案或字的字符，以避免在形成识别标记期间的污染和产生故障模具。

公开(公告)号：US6116427A

公开(公告)日：2000-09-12

申请号：US494891

申请日：2000-01-31

Applicant: Chung-Ju Wu ,  Wei-Feng Lin ,  Chen-Wen Tsai

Inventor： Chung-Ju Wu ,  Wei-Feng Lin ,  Chen-Wen Tsai

IPC: H01L21/673 ,  H05K13/00 ,  B65D73/02

CPC classification number: H01L21/67333 ,  H05K13/0084

Abstract: A tray is adapted to receive a plurality of ball grid array devices therein, and includes a base plate having a device-receiving portion and a peripheral portion around the device-receiving portion. The device-receiving portion has a top side formed with a device-receiving recess. The top side of the device-receiving portion is further formed with a partition unit in the device-receiving recess for dividing the device-receiving recess into a plurality of cavities adapted for receiving the ball grid array devices respectively therein. The device-receiving portion further has a bottom side formed with a plurality of openings. Each of the openings is aligned with a corresponding one of the cavities and is adapted to receive an array of ball contacts formed on a bottom side of the ball grid array device that is disposed in the corresponding one of the cavities therein. The openings are grouped into a set of first openings remote from the peripheral portion and a set of second openings surrounding the first openings and adjacent to the peripheral portion. Guard strips are formed on the bottom side of the device-receiving portion and are disposed solely and respectively in the second openings.

Abstract translation: 托盘适于在其中容纳多个球栅阵列器件，并且包括具有器件接收部分和围绕器件接收部分的周边部分的基板。 装置接收部分具有形成有装置容纳凹部的顶侧。 装置接收部分的顶侧还在装置容纳凹槽中形成有分隔单元，用于将装置容纳凹槽分成适于分别容纳球栅阵列装置的多个空腔。 装置接收部还具有形成有多个开口的底侧。 每个开口与相应的一个空腔对准，并且适于接收形成在球栅阵列器件的底侧上的球形触点阵列，其布置在其中的相应的一个空腔中。 开口被分组成远离周边部分的一组第一开口和围绕第一开口并且邻近周边部分的一组第二开口。 保护条形成在装置接收部分的底侧上，并且分别单独设置在第二开口中。

公开(公告)号：US6098100A

公开(公告)日：2000-08-01

申请号：US92989

申请日：1998-06-08

Applicant: Yih-Sheng Wey ,  Yuan-Hwa Li

Inventor： Yih-Sheng Wey ,  Yuan-Hwa Li

IPC: G06F13/38 ,  H04L12/12 ,  G06F15/17

CPC classification number: H04L12/12 ,  G06F13/385 ,  Y02B60/34

Abstract: In a method and apparatus for detecting a wake packet among data bytes in a packet frame issued by a network device, the data bytes in the packet frame are initially compared with a sync byte to detect start of a synchronization stream of the wake packet. The number of consecutive sync matches of the data bytes in the packet frame with the sync byte is counted, and a partial match flag is set upon detection that the number of consecutive sync matches has reached a predetermined number of sync duplications of the sync byte to indicate that the synchronization stream has been detected in the packet frame. When the partial match flag is set, the data bytes that follow the synchronization stream in the packet frame are compared with address bytes of a destination address assigned to a sleeping node. The number of consecutive address byte matches of the data bytes in the packet frame with the address bytes of the destination address is counted, and a packet detected signal is provided to the sleeping node upon detection that the number of consecutive address byte matches has reached a pre-programmed number of address byte matches, the pre-programmed number of address byte matches being less than a total number of address bytes of a destination address stream of the wake packet.

Abstract translation: 在由网络设备发布的分组帧中检测数据字节中的唤醒分组的方法和装置中，首先将分组帧中的数据字节与同步字节进行比较，以检测唤醒分组的同步流的起始。 对分组帧中的数据字节与同步字节的连续同步匹配的次数进行计数，并且在检测到连续同步匹配的数量已经达到同步字节的预定数量的同步复制的情况下，设置部分匹配标志 表示在分组帧中已经检测到同步流。 当设置了部分匹配标志时，将分组帧中的同步流之后的数据字节与分配给休眠节点的目的地地址的地址字节进行比较。 对分组帧中的数据字节与目标地址的地址字节的连续地址字节匹配的次数进行计数，并且在检测到连续的地址字节匹配的数量已经达到一个时，向睡眠节点提供分组检测信号 预编程的地址字节数匹配，预编程的地址字节数匹配小于唤醒分组的目的地地址流的地址字节的总数。

公开(公告)号：US6009032A

公开(公告)日：1999-12-28

申请号：US326051

申请日：1999-06-04

Applicant: Hsiu-Ping Lin ,  Hsing-Yi Chen

Inventor： Hsiu-Ping Lin ,  Hsing-Yi Chen

IPC: G11C7/06

CPC classification number: G11C7/062

Abstract: A cell-sensing unit is applied to a memory device having a cell associated operably with a complementary pair of bit lines and a word line. The cell-sensing unit includes a current sense amplifier having a first input side adapted to be connected to the bit lines, and a first output side, and a voltage amplifier having a second input side connected to the first output side of the current sense amplifier, and a second output side. The current sense amplifier is capable of magnifying a difference between currents flowing through the bit lines during a read cycle of the cell, and generates a corresponding voltage difference at the first output side. The voltage difference is received by the voltage amplifier at the second input side, and has a magnitude sufficient to enable the voltage amplifier to generate an output signal at the second output side corresponding to data stored in the cell.

Abstract translation: 细胞感测单元被应用于具有与互补的一对位线和字线可操作地关联的单元的存储器件。 电池感测单元包括具有适于连接到位线的第一输入侧的电流检测放大器和第一输出侧，以及具有连接到电流读出放大器的第一输出侧的第二输入端的电压放大器 ，和第二输出侧。 电流读出放大器能够在单元的读取周期期间放大流过位线的电流之间的差异，并且在第一输出侧产生相应的电压差。 电压差由第二输入侧的电压放大器接收，并具有足以使电压放大器在对应于存储在单元中的数据的第二输出侧产生输出信号的幅度。

公开(公告)号：US5883984A

公开(公告)日：1999-03-16

申请号：US724892

申请日：1996-10-03

Applicant: Ching-Mei Huang ,  Jo-Tan Yao ,  Hung-Ju Huang

Inventor： Ching-Mei Huang ,  Jo-Tan Yao ,  Hung-Ju Huang

IPC: G06T5/20 ,  H04N1/60 ,  G06K9/36

CPC classification number: H04N1/60 ,  G06T5/20

Abstract: A method for contrast enhancement of pixel data of a decompressed color image includes the steps of computing I component values in an HSI color space for the pixel data of the color image, computing an image I component value which is an average of the computed I component values, and enhancing each of the pixel data of the color image according to the image I component value. An apparatus for contrast enhancement of pixel data of a decompressed color image is also disclosed.

Abstract translation: 解压缩彩色图像的像素数据的对比度增强方法包括以下步骤：计算彩色图像的像素数据的HSI颜色空间中的I分量值，计算作为计算的I分量的平均值的图像I分量值 值，并且根据图像I分量值增强彩色图像的每个像素数据。 还公开了一种用于减压彩色图像的像素数据的对比度增强的装置。

公开(公告)号：US5761718A

公开(公告)日：1998-06-02

申请号：US705738

申请日：1996-08-30

Applicant: Yung Cheng Lin ,  Shih Jen Chuang

Inventor： Yung Cheng Lin ,  Shih Jen Chuang

IPC: G06F9/38 ,  G06F12/08

CPC classification number: G06F12/0862 ,  G06F9/383 ,  G06F2212/6026

Abstract: An algorithm for conditionally pre-fetching data for DRAM access is disclosed. A similar pattern of performing successive block reads of DRAM data in the execution of several types of instructions in a computer system is determined by analyzing CPU signals. These instructions repeatedly read blocks of data from a local memory area. Additional writes to memory or an input/output port may intervene between the repeated block reads. By using the pattern as a condition for pre-fetching data from DRAM into a high speed memory buffer of a memory controller, consecutive memory reads can be completed with zero wait state. The penalty incurred by unconditional pre-fetching of DRAM data is minimized. The conditional pre-fetching mechanism is applicable to other computer peripheral devices.

Abstract translation: 公开了一种用于有条件地预取DRAM访问数据的算法。 通过分析CPU信号来确定执行计算机系统中的几种类型的指令的DRAM数据的连续块读取的类似模式。 这些指令重复从本地存储区读取数据块。 对存储器或输入/输出端口的额外写入可能会在重复的块读取之间进行干预。 通过使用该模式作为将数据从DRAM预取到存储器控制器的高速存储器缓冲器的条件，可以以零等待状态完成连续存储器读取。 无条件预取DRAM数据造成的惩罚最小化。 条件预取机制适用于其他计算机外围设备。