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公开(公告)号:US12274082B2
公开(公告)日:2025-04-08
申请号:US17380040
申请日:2021-07-20
Applicant: INNOSCIENCE (SUZHOU) TECHNOLOGY CO., LTD.
Inventor: Yi-Lun Chou , Kye Jin Lee , Han-Chin Chiu , Xiuhua Pan
IPC: H10D30/47 , H01L23/00 , H10D62/17 , H10D62/824 , H10D62/85
Abstract: A semiconductor device includes a nucleation layer, a buffer layer, a first nitride-based semiconductor layer, a second nitride-based semiconductor layer, S/D electrodes, and a gate electrode. The nucleation layer includes a composition that includes a first element. The buffer layer includes a III-V compound which includes the first element. The buffer layer is disposed on and forms an interface with the nucleation layer. The buffer layer has a concentration of the first element oscillating within the buffer layer, such that the concentration of the first element varies as an oscillating function of a distance within a thickness of the buffer layer. Spacings among adjacent peaks of the oscillating function change from narrow to wide with respect to a first reference point within the buffer layer. The first and second nitride-based semiconductor layer, S/D electrodes, and a gate electrode are disposed on the buffer layer.
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公开(公告)号:US12273037B2
公开(公告)日:2025-04-08
申请号:US17852392
申请日:2022-06-29
Applicant: Novatek Microelectronics Corp.
Inventor: Sheng-Hsi Hung , Yen-Ching Lin
Abstract: A driving circuit includes a first driving signal generator, a first voltage conversion circuit and a first switch. The first driving signal generator generates a first driving signal according a first input signal, wherein the first driving signal is a pulse width modulated signal. The first voltage conversion circuit is coupled between the first driving signal generator and a control terminal of a first power transistor, converts the first driving signal to an output driving signal by charges a capacitor and discharges the capacitor, wherein the output driving signal is output to the control terminal of the first power transistor. The first switch is couple with the first power transistor in series, and is controlled by a control signal to be turned-on or cut-off.
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公开(公告)号:US12272771B2
公开(公告)日:2025-04-08
申请号:US17515566
申请日:2021-11-01
Applicant: Au Optronics Corporation
Inventor: Ming-Lung Chen , Kun-Cheng Tien , Chien-Huang Liao
Abstract: A display panel, including a circuit substrate, a light emitting diode, and a reflective layer, is provided. The light emitting diode includes a light emitting layer and first and second semiconductor layers. The light emitting layer is located between the first and second semiconductor layers. The second semiconductor layer is located between the first semiconductor layer and the circuit substrate. The reflective layer is in contact with a part of a side surface of the light emitting diode. A part of the reflective layer is located between the light emitting diode and the circuit substrate. Taking a direction perpendicular to a top surface of the circuit substrate as a height direction, a horizontal height of a top surface of the reflective layer is located between a horizontal height of a top surface of the light emitting layer and a horizontal height of a top surface of the light emitting diode.
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公开(公告)号:US12272622B2
公开(公告)日:2025-04-08
申请号:US18325104
申请日:2023-05-29
Inventor: Ming-Fa Chen , Sung-Feng Yeh , Jian-Wei Hong
IPC: H01L23/48 , H01L21/463 , H01L21/56 , H01L21/768 , H01L23/31 , H01L23/544 , H01L25/00 , H01L25/065
Abstract: A package includes a semiconductor carrier, a first die, a second die, a redistribution structure, and an electron transmission path. The first die is disposed over the semiconductor carrier. The second die is stacked on the first die. The redistribution structure is over the second die. The electron transmission path extends from the semiconductor carrier to the redistribution structure. The electron transmission path is electrically connected to a ground voltage. A first portion of the electron transmission path is embedded in the semiconductor carrier, a second portion of the electron transmission path is aside the first die, and a third portion of the electron transmission path is aside the second die.
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公开(公告)号:US12272612B2
公开(公告)日:2025-04-08
申请号:US17697959
申请日:2022-03-18
Inventor: Wensen Hung , Tsung-Yu Chen
IPC: H01L23/367 , H01L23/29 , H01L23/528 , H01L23/00 , H01L25/065
Abstract: A semiconductor package module includes a package, a conductive layer, and a heat dissipating module. The package includes a semiconductor die. The conductive layer is disposed over the package. The heat dissipating module is disposed over the conductive layer, and the package and the heat dissipating module prop against two opposite sides of the conductive layer, where the heat dissipating module is thermally coupled to and electrically isolated from the package through the conductive layer.
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公开(公告)号:US12272568B2
公开(公告)日:2025-04-08
申请号:US18362992
申请日:2023-08-01
Inventor: Jiun-Ting Chen , Chih-Wei Wu , Szu-Wei Lu , Tsung-Fu Tsai , Ying-Ching Shih , Ting-Yu Yeh , Chen-Hsuan Tsai
IPC: H01L23/13 , H01L21/304 , H01L21/56 , H01L23/00 , H01L23/14 , H01L23/31 , H01L25/065 , H01L25/18 , H01L23/48
Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes at least one semiconductor die, an interposer, an encapsulant, a protection layer and connectors. The interposer has a first surface, a second surface opposite to the first surface and sidewalls connecting the first and second surfaces. The semiconductor die is disposed on the first surface of interposer and electrically connected with the interposer. The encapsulant is disposed over the interposer and laterally encapsulating the at least one semiconductor die. The connectors are disposed on the second surface of the interposer and electrically connected with the at least one semiconductor die through the interposer. The protection layer is disposed on the second surface of the interposer and surrounding the connectors. The sidewalls of the interposer include slanted sidewalls connected to the second surface, and the protection layer is in contact with the slant sidewalls of the interposer.
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公开(公告)号:US12272506B2
公开(公告)日:2025-04-08
申请号:US18163304
申请日:2023-02-02
Applicant: TMY Technology Inc.
Inventor: Su-Wei Chang
Abstract: An electrical switch, including an insulation base, an insulative-and-movable component, at least two output ports, and at least two transmission ports, is provided. The insulative-and-movable component is disposed on the insulation base and is adapted to operate between at least two switch positions relative to the insulation base. The two output ports are disposed on the insulation base. The two transmission ports are disposed on the insulative-and-movable component. When the insulative-and-movable component is located at one of the two switch positions, one of the two output ports is aligned with one of the two transmission ports and other one of the two output ports is misaligned with other one of the two transmission ports.
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公开(公告)号:US12271523B2
公开(公告)日:2025-04-08
申请号:US18634995
申请日:2024-04-14
Applicant: SOUTHEAST UNIVERSITY
Inventor: Baoguo Xu , Qianqian Lu , Weifeng Peng , Aiguo Song
IPC: G06F3/01
Abstract: Disclosed is a lightweight hand exoskeleton force feedback apparatus, including a driver, a first rotating link, a second rotating link, a first linkage link, a second linkage link, a finger sleeve, and a pressure sensor fixing member; the driver is worn on a back of metacarpal bone of a human hand, the finger sleeve is fixed on an index finger, and the pressure sensor fixing member is fixed below the index finger; when the human hand bends to simulate a state of grasping an object, the driver drives the first rotating link to couple with the first linkage link and the second linkage link through the second rotating link to drive the finger sleeve to bend and stretch, force feedback is applied to the fingertip, and a pressure is accordingly imposed on a pressure sensor of the pressure sensor fixing member, so that closed-loop force feedback control is implemented.
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公开(公告)号:US12271237B2
公开(公告)日:2025-04-08
申请号:US18307795
申请日:2023-04-27
Applicant: ASUSTeK COMPUTER INC.
Inventor: Chih-Han Chang , Tsung-Ju Chiang , Chi-Hung Lin , Yen-Ting Liu
IPC: G06F1/16
Abstract: A foldable electronic device includes a first body having an end and a first inclined surface, a second body having a second inclined surface, and a hinge module. The end includes an accommodating area. A virtual shaft line exists between sides of the first inclined surface and the second inclined surface that are closest to each other. The second body rotates relative to the first body through the virtual shaft line. The hinge module includes a first bracket adjacent to the first inclined surface, connected to the first body, and located in the accommodating area, a second bracket adjacent to the second inclined surface and connected to the second body, and a third bracket including a first end and a second end. The first bracket is connected to the first end through a first torsion assembly. The second bracket is connected to the second end through a second torsion assembly.
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60.
公开(公告)号:US12270846B2
公开(公告)日:2025-04-08
申请号:US18322580
申请日:2023-05-23
Applicant: Chunghwa Telecom Co., Ltd.
Inventor: Chang-Lun Liao , You-Hua Lin , Jiahn-Wei Lin , Bo-Cheng You , Chang-Fa Yang , De-Xian Song , Wen-Jiao Liao , Yuan-Chang Hou , Tswen-Jiann Huang
Abstract: A measuring system and a measuring method of an antenna pattern based on near field to far field transformation (NFTF) are provided. The measuring system includes a probe antenna, a reference antenna, and a control system. The probe antenna measures an electric field radiated by an antenna under test to obtain electric field information. The reference antenna measures the electric field to obtain a reference phase. The control system is coupled to the antenna under test, the probe antenna, and the reference antenna, wherein the control system applies near field focusing to the reference antenna to configure a focus point of the reference antenna on the antenna under test, and the control system performs the NFTF according to the electric field information and the reference phase to output far field patterns.
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