公开(公告)号：US20240414137A1

公开(公告)日：2024-12-12

申请号：US18208082

申请日：2023-06-09

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： SeyedMohammad SeyedzadehDelcheh ,  Sergey Blagodurov ,  Donald Matthews Jr.

IPC: H04L9/40

Abstract: A processing system implementing end-to-end encryption includes a number of nodes each connected to a network and including a respective processor. Further, at least one node connected to the network includes a one-time pad (OTP) pregeneration circuitry configured to select an OTP pregeneration operating mode based on the number of nodes connected to the network. Further, the pregeneration circuitry of the node is configured to generate an OTP associated with another node connected to the network based on the selected OTP pregeneration operating mode before a packet is received from that node.

公开(公告)号：US20240319910A1

公开(公告)日：2024-09-26

申请号：US18731056

申请日：2024-05-31

Applicant: Advanced Micro Devices, Inc.

Inventor： Vamsee Reddy Kommareddy ,  SeyedMohammad SeyedzadehDelcheh ,  Sergey Blagodurov

IPC: G06F3/06 ,  G06F9/50 ,  G06F12/0802

CPC classification number: G06F3/0655 ,  G06F3/0602 ,  G06F3/065 ,  G06F3/0653 ,  G06F9/5027 ,  G06F12/0802 ,  G06F2212/60

Abstract: One or both of read and write accesses to a fabric-attached memory module via a fabric interconnect are monitored. In one or more implementations, offloading of one or more tasks accessing the fabric-attached memory module to a processor of a routing system associated with the fabric-attached memory module is initiated based on the read and write accesses to the fabric-attached memory module. Additionally or alternatively, replicating memory of the fabric-attached memory module to a cache memory of a computing node in the disaggregated memory system executing one or more tasks of a host application is initiated based on the write accesses to the fabric-attached memory module.

公开(公告)号：US12019904B2

公开(公告)日：2024-06-25

申请号：US17552015

申请日：2021-12-15

Applicant: Advanced Micro Devices, Inc.

Inventor： Vamsee Reddy Kommareddy ,  Seyedmohammad SeyedzadehDelcheh ,  Sergey Blagodurov

IPC: G06F3/00 ,  G06F3/06 ,  G06F9/50 ,  G06F12/0802

CPC classification number: G06F3/0655 ,  G06F3/0602 ,  G06F3/065 ,  G06F3/0653 ,  G06F9/5027 ,  G06F12/0802 ,  G06F2212/60

Abstract: One or both of read and write accesses to a fabric-attached memory module via a fabric interconnect are monitored. In one or more implementations, offloading of one or more tasks accessing the fabric-attached memory module to a processor of a routing system associated with the fabric-attached memory module is initiated based on the read and write accesses to the fabric-attached memory module. Additionally or alternatively, replicating memory of the fabric-attached memory module to a cache memory of a computing node in the disaggregated memory system executing one or more tasks of a host application is initiated based on the write accesses to the fabric-attached memory module.

公开(公告)号：US11956368B2

公开(公告)日：2024-04-09

申请号：US17555020

申请日：2021-12-17

Applicant: Advanced Micro Devices, Inc.

Inventor： Sergey Blagodurov ,  Andrew G. Kegel

IPC: H04L29/06 ,  G06N3/08 ,  H04L9/32

CPC classification number: H04L9/3239 ,  G06N3/08

Abstract: An approach is provided for implementing a useful proof-of-work consensus algorithm. A proposed block is received. A combined hash value is generated based on the proposed block and a nonce value. The combined hash value is divided into a plurality of hash value pieces that each correspond to a work packet of a plurality of work packets. One or more requests are transmitted for the plurality of work packets that correspond to the plurality of hash value pieces. In response to receiving the plurality of work packets, a plurality of results is generated by performing, for each work packet of the plurality of work packets, one or more operations to complete work specified by the respective work packet. In response to determining that at least one result of the plurality of results satisfies one or more criteria, the proposed block is added to a blockchain maintained by the blockchain network.

公开(公告)号：US20240111355A1

公开(公告)日：2024-04-04

申请号：US17956606

申请日：2022-09-29

Applicant: Advanced Micro Devices, Inc.

Inventor： Sergey Blagodurov ,  Kevin Y. Cheng ,  SeyedMohammad SeyedzadehDelcheh ,  Masab Ahmad

IPC: G06F1/329

CPC classification number: G06F1/329

Abstract: Methods and systems are disclosed for reducing power consumption by a system including a digital unit and an optical unit. Techniques disclosed comprise generating a workload signature of an incoming workload to be executed by the system. Based on the generated workload signature, techniques disclosed comprise matching the incoming workload with a profile of stored workload profiles. The workload profiles are generated by a trace capture unit. Based on the associated profile, a task submission transaction is sent to the optical unit of the system, representative of a request to execute the incoming workload by the optical unit.

公开(公告)号：US20240004645A1

公开(公告)日：2024-01-04

申请号：US17854434

申请日：2022-06-30

Applicant: Advanced Micro Devices, Inc.

Inventor： Sergey Blagodurov ,  Ganesh Suryanarayanc Dasika

IPC: G06F9/22 ,  G06F9/30 ,  G06N3/04

CPC classification number: G06F9/226 ,  G06F9/223 ,  G06N3/04 ,  G06F9/30036 ,  G06F9/30025

Abstract: An intermediate representation (IR) controller is described that, for a given intermediate representation (IR) primitive, selects a hardware compute unit of a plurality of hardware compute units. In a non-limiting example, the IR controller receives an input that specifies an IR primitive, a device mask indicating a type of hardware circuitry to be used to process the primitive, and a goal vector specifying a goal in the processing of the primitive. The IR controller also collects data describing power consumption by respective hardware compute units and completion times for processing respective IR primitives. This data is maintained as implementation profiles that describe operation of respective hardware compute units in processing respective IR primitives, e.g., as histograms. The implementation profiles are then leveraged by the IR controller to select hardware compute units for execution of subsequent IR primitives.

公开(公告)号：US11756606B2

公开(公告)日：2023-09-12

申请号：US17549359

申请日：2021-12-13

Applicant: Advanced Micro Devices, Inc.

Inventor： Sriseshan Srikanth ,  Vignesh Adhinarayanan ,  Jagadish B. Kotra ,  Sergey Blagodurov

IPC: G11C11/4093 ,  G11C11/4096 ,  H03K19/17728 ,  G11C8/18 ,  H03K19/173 ,  G11C11/408

CPC classification number: G11C11/4093 ,  G11C8/18 ,  G11C11/4087 ,  G11C11/4096 ,  H03K19/1737 ,  H03K19/17728

Abstract: A fine-grained dynamic random-access memory (DRAM) includes a first memory bank, a second memory bank, and a dual mode I/O circuit. The first memory bank includes a memory array divided into a plurality of grains, each grain including a row buffer and input/output (I/O) circuitry. The dual-mode I/O circuit is coupled to the I/O circuitry of each grain in the first memory bank, and operates in a first mode in which commands having a first data width are routed to and fulfilled individually at each grain, and a second mode in which commands having a second data width different from the first data width are fulfilled by at least two of the grains in parallel.

公开(公告)号：US20230186976A1

公开(公告)日：2023-06-15

申请号：US17549359

申请日：2021-12-13

Applicant: Advanced Micro Devices, Inc.

Inventor： Sriseshan Srikanth ,  Vignesh Adhinarayanan ,  Jagadish B. Kotra ,  Sergey Blagodurov

IPC: G11C11/4093 ,  G11C11/4096 ,  G11C11/408 ,  G11C8/18 ,  H03K19/173 ,  H03K19/17728

CPC classification number: G11C11/4093 ,  G11C11/4096 ,  G11C11/4087 ,  G11C8/18 ,  H03K19/1737 ,  H03K19/17728

Abstract: A fine-grained dynamic random-access memory (DRAM) includes a first memory bank, a second memory bank, and a dual mode I/O circuit. The first memory bank includes a memory array divided into a plurality of grains, each grain including a row buffer and input/output (I/O) circuitry. The dual-mode I/O circuit is coupled to the I/O circuitry of each grain in the first memory bank, and operates in a first mode in which commands having a first data width are routed to and fulfilled individually at each grain, and a second mode in which commands having a second data width different from the first data width are fulfilled by at least two of the grains in parallel.

公开(公告)号：US11656796B2

公开(公告)日：2023-05-23

申请号：US17219505

申请日：2021-03-31

Applicant: Advanced Micro Devices, Inc.

Inventor： Sergey Blagodurov ,  Brandon K. Potter ,  Johnathan Alsop

IPC: G06F3/06 ,  G06F9/30 ,  G06F9/38

CPC classification number: G06F3/0659 ,  G06F3/067 ,  G06F3/0658 ,  G06F9/30087 ,  G06F9/3838 ,  G06F3/0604

Abstract: A data processor includes a fabric-attached memory (FAM) interface for coupling to a data fabric and fulfilling memory access instructions. A requestor-side adaptive consistency controller coupled to the FAM interface requests notifications from a fabric manager for the fabric-attached memory regarding changes in requestors authorized to access a FAM region which the data processor is authorized to access. If a notification indicates that more than one requestor is authorized to access the FAM region, fences are activated for selected memory access instructions in a local application.

公开(公告)号：US20220317927A1

公开(公告)日：2022-10-06

申请号：US17219505

申请日：2021-03-31

Applicant: Advanced Micro Devices, Inc.

Inventor： Sergey Blagodurov ,  Brandon K. Potter ,  Johnathan Alsop

IPC: G06F3/06 ,  G06F9/38 ,  G06F9/30

Abstract: A data processor includes a fabric-attached memory (FAM) interface for coupling to a data fabric and fulfilling memory access instructions. A requestor-side adaptive consistency controller coupled to the FAM interface requests notifications from a fabric manager for the fabric-attached memory regarding changes in requestors authorized to access a FAM region which the data processor is authorized to access. If a notification indicates that more than one requestor is authorized to access the FAM region, fences are activated for selected memory access instructions in a local application.