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公开(公告)号:US08125265B2
公开(公告)日:2012-02-28
申请号:US13136921
申请日:2011-08-15
Applicant: David Kung , Leif Lund
Inventor: David Kung , Leif Lund
IPC: G05F1/10
CPC classification number: G05F3/30
Abstract: A temperature independent reference circuit includes first and second bipolar transistors with commonly coupled bases. First and second resistors are coupled in series between the emitter of the second bipolar transistor and ground. The first and second resistors have first and second resistance values, R1 and R2, and third and second temperature coefficients, TC3 and TC2, respectively. The resistance values being such that a temperature coefficient of a difference between the base-emitter voltages of the first and second bipolar transistors, TC1, is substantially equal to TC2×(R2/(R1+R2))+TC3×(R1/(R1+R2)), resulting in a reference current flowing through each of the first and second bipolar transistors that is substantially constant over temperature. A third resistor coupled between a node and the collector of the second bipolar transistor has a value such that a reference voltage generated at the node is substantially constant over temperature.
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52.
公开(公告)号:US20110145005A1
公开(公告)日:2011-06-16
申请号:US12634967
申请日:2009-12-10
Applicant: Wu Cao , Balaji Gadhiraju , Sridhar Gantimahapatruni , David Kung , Marc Maillart , Awez Syed , Aun-Khuan Tan
Inventor: Wu Cao , Balaji Gadhiraju , Sridhar Gantimahapatruni , David Kung , Marc Maillart , Awez Syed , Aun-Khuan Tan
CPC classification number: G06Q10/10
Abstract: A system and method for automatic business content discovery are described. In various embodiments, a system includes modules to bind business terms to data validation rules and search data sources for data matching data validation rules. In various embodiments, the system binds matching data to data validation rules. In various embodiments, a user interface is provided for creating and managing business terms and data validation rules. In various embodiments, a method for profiling and monitoring data via graphical controls is presented.
Abstract translation: 描述了用于自动商业内容发现的系统和方法。 在各种实施例中,系统包括用于将业务术语绑定到数据验证规则的模块和用于数据匹配数据验证规则的搜索数据源。 在各种实施例中,系统将匹配数据绑定到数据验证规则。 在各种实施例中,提供用于创建和管理业务术语和数据验证规则的用户界面。 在各种实施例中,呈现通过图形控件对数据进行分析和监视的方法。
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公开(公告)号:US07893754B1
公开(公告)日:2011-02-22
申请号:US12587204
申请日:2009-10-02
Applicant: David Kung , Leif Lund
Inventor: David Kung , Leif Lund
IPC: G05F1/10
CPC classification number: G05F3/30
Abstract: A temperature independent reference circuit includes first and second bipolar transistors with commonly coupled bases. First and second resistors are coupled in series between the emitter of the second bipolar transistor and ground. The first and second resistors have first and second resistance values, R1 and R2, and third and second temperature coefficients, TC3 and TC2, respectively. The resistance values being such that a temperature coefficient of a difference between the base-emitter voltages of the first and second bipolar transistors, TC1, is substantially equal to TC2×(R2/(R1+R2))+TC3×(R1/(R1+R2)), resulting in a reference current flowing through each of the first and second bipolar transistors that is substantially constant over temperature. A third resistor coupled between a node and the collector of the second bipolar transistor has a value such that a reference voltage generated at the node is substantially constant over temperature.
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54.
公开(公告)号:US20070287224A1
公开(公告)日:2007-12-13
申请号:US11737598
申请日:2007-04-19
Applicant: Syed Alam , Ibrahim Elfadel , Kathryn Guarini , Meikei Ieong , Prabhakar Kudva , David Kung , Mark Lavin , Arifur Rahman
Inventor: Syed Alam , Ibrahim Elfadel , Kathryn Guarini , Meikei Ieong , Prabhakar Kudva , David Kung , Mark Lavin , Arifur Rahman
IPC: H01L21/02
CPC classification number: H01L27/0688 , H01L21/2007 , H01L21/84 , H01L27/1203
Abstract: A three dimensional (3D) integrated circuit (IC), 3D IC chip and method of fabricating a 3D IC chip. The chip includes multiple layers of circuits, e.g., silicon insulator (SOI) CMOS IC layers, each including circuit elements. The layers may be formed in parallel and one layer attached to another to form a laminated 3D chip.
Abstract translation: 三维(3D)集成电路(IC),3D IC芯片和制造3D IC芯片的方法。 该芯片包括多层电路,例如硅绝缘体(SOI)CMOS IC层,每层包括电路元件。 这些层可以平行地形成,并且一层附着到另一层以形成层叠的3D芯片。
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55.
公开(公告)号:US20070209157A1
公开(公告)日:2007-09-13
申请号:US11783700
申请日:2007-04-11
Applicant: David Kung
Inventor: David Kung
IPC: E05D7/06
CPC classification number: E05D15/262 , E05F1/10 , E05Y2201/624 , E05Y2800/372 , E05Y2900/20 , Y10T16/53235
Abstract: The invention relates to a retaining and adjusting device for displaceable furniture parts, in particular for a leaf that is hinged so that it can pivot horizontally on an item of furniture, e.g. for a leaf of an upper cupboard. Said device comprises at least one control lever, whose length can be adjusted and which can be hinged on the part, the length of the control level and/or the position of the bearing point of the control lever being adjustable when the furniture part is closed.
Abstract translation: 本发明涉及一种用于可移动的家具部件的保持和调节装置,特别是用于铰链的叶片,使得其可以在家具件上水平地枢转,例如, 用于上部橱柜的叶子。 所述装置包括至少一个控制杆,其长度可被调整并且可以铰接在该部件上,当家具部件关闭时,控制杆的轴承点的长度和/或可调节的位置 。
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56.
公开(公告)号:US20060033110A1
公开(公告)日:2006-02-16
申请号:US10919121
申请日:2004-08-16
Applicant: Syed Alam , Ibrahim Elfadel , Kathryn Guarini , Meikei Ieong , Prabhakar Kudva , David Kung , Mark Lavin , Arifur Rahman
Inventor: Syed Alam , Ibrahim Elfadel , Kathryn Guarini , Meikei Ieong , Prabhakar Kudva , David Kung , Mark Lavin , Arifur Rahman
IPC: H01L29/04
CPC classification number: H01L27/0688 , H01L21/2007 , H01L21/84 , H01L27/1203
Abstract: A three dimensional (3D) integrated circuit (IC), 3D IC chip and method of fabricating a 3D IC chip. The chip includes multiple layers of circuits, e.g., silicon insulator (SOI) CMOS IC layers, each including circuit elements. The layers may be formed in parallel and one layer attached to another to form a laminated 3D chip.
Abstract translation: 三维(3D)集成电路(IC),3D IC芯片和3D IC芯片的制造方法。 该芯片包括多层电路,例如硅绝缘体(SOI)CMOS IC层,每层包括电路元件。 这些层可以平行地形成,并且一层附着到另一层以形成层叠的3D芯片。
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公开(公告)号:US20050110519A1
公开(公告)日:2005-05-26
申请号:US10720466
申请日:2003-11-24
Applicant: Anthony Correale , Rajiv Joshi , David Kung , Zhigang Pan , Ruchir Puri
Inventor: Anthony Correale , Rajiv Joshi , David Kung , Zhigang Pan , Ruchir Puri
IPC: H03K19/0185 , H03K19/0948 , H03K19/094
CPC classification number: H03K19/018521 , H03K19/0948
Abstract: A level converter for interfacing two circuits supplied by different supply voltages, and integrated circuit including the level converter interfacing circuit in two different voltage islands. A first buffer is supplied by a virtual supply and receives an input signal from a lower voltage circuit. The first buffer drives a second buffer, which is supplied by a higher supply voltage. An output from the second buffer switches a supply select to selectively pass the higher supply voltage or a reduced supply voltage to the first buffer.
Abstract translation: 用于连接由不同电源电压提供的两个电路的电平转换器,以及包括在两个不同电压岛中的电平转换器接口电路的集成电路。 第一缓冲器由虚拟电源提供,并从低电压电路接收输入信号。 第一个缓冲器驱动第二个缓冲器,该缓冲器由较高的电源电压供电。 来自第二缓冲器的输出切换电源选择以选择性地将较高电源电压或降低的电源电压传递到第一缓冲器。
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