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公开(公告)号：US12111741B2
公开(公告)日：2024-10-08
申请号：US17754561
申请日：2021-07-06
Inventor： Chen Ma
IPC: G06F11/28
CPC classification number: G06F11/28
Abstract: An automatic test method and apparatus, an electronic device, and a storage medium are provided, which relate to the fields of the automatic test, the voice testing, the voice effect acceptance check, etc. The method includes: receiving a test task initiated by a visualization front-end; issuing the test task to a plurality of clients deployed; and scheduling execution of the test task for the plurality of clients, and feeding back obtained task execution results to the visualization front-end.
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2.发明公开公开(公告)号：US20240028440A1
公开(公告)日：2024-01-25
申请号：US18028846
申请日：2021-09-03
Applicant: Siemens Aktiengesellschaft
Inventor： Karl-Hermann WITTE
CPC classification number: G06F11/0775 , G06F11/0793 , G06F11/28
Abstract: A method, a device and computer program for recording a plurality of events in an encoded tracer variable in a security-oriented computer program, wherein each event is recorded as a value in the encoded tracer variable, where in order to simultaneously record multiple events from the values for the events, a total value is first calculated which is then recorded in the encoded tracer variable, such that multiple independent consistency criteria can be advantageously processed simultaneously to detect and propagate errors or other events and such that by virtue of the simultaneous processing, many dynamic effects are prevented during the detection and propagation of errors/events, thus allowing for the necessary reduced complexity of security programs.
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公开(公告)号：US20240012728A1
公开(公告)日：2024-01-11
申请号：US18220229
申请日：2023-07-10
Applicant: Jason Nieh , Ronghui Gu , Xuheng Li , Xupeng Li
Inventor： Jason Nieh , Ronghui Gu , Xuheng Li , Xupeng Li
CPC classification number: G06F11/28 , G06F11/3612 , G06F11/3636
Abstract: Mechanisms for verifying software on a multi-CPU machine are provided, the mechanisms including: using a hardware processor: reordering, in a shared log, a first local CPU event from a local CPU operating on a shared object to be before at least one first prior oracle query corresponding to a prior event from another CPU based on whether the first local CPU event can be reordered with respect to the prior event without changing the multi-CPU machine's behavior with respect to the shared object; merging first consecutive oracle queries including the at least one first prior oracle query in the shared log; and verifying the software based on the merged first consecutive oracle queries.
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公开(公告)号：US11656965B2
公开(公告)日：2023-05-23
申请号：US17461179
申请日：2021-08-30
Applicant: Argo AI, LLC
Inventor： Ching Yee Hu
CPC classification number: G06F11/28 , G06F11/0736 , G06F11/0751 , G06F11/0793 , H04L9/0643
Abstract: A method of verifying execution sequence integrity of an execution flow includes receiving, by a local monitor of an automated device monitoring system from one or more sensors of an automated device, a unique identifier for each function in a subset of an execution flow for which the local monitor is responsible for monitoring. The method includes combining the received unique identifiers to generate a combination value, applying a hashing algorithm to the combination value to generate a temporary hash value, retrieving, from a data store, a true hash value, determining whether the temporary hash value matches the true hash value, and in response to the temporary hash value not matching the true hash value, generating a fault notification. The true hash value represents a result of applying the hashing algorithm to a combination of actual unique identifiers associated with each function in the subset.
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公开(公告)号：US11269988B2
公开(公告)日：2022-03-08
申请号：US16235731
申请日：2018-12-28
Applicant: GUARDSQUARE NV
Inventor： Sander Bogaert
Abstract: An automated application verification module is provided to identify one or more functions of a software application. There is added, for at least one of the identified functions, a verification prologue at the entry point of the function which does not alter the control flow of the original set of instructions of the function and/or does not change the semantics of the function when the verification prologue is executed in its entirety. There is added at least one corresponding verification prologue check to the software application, such that the verification prologue check is configured to automatically check the integrity of the corresponding verification prologue during execution of the software application.
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Patent Agency Ranking
公开(公告)号：US11093331B2
公开(公告)日：2021-08-17
申请号：US16223843
申请日：2018-12-18
Applicant: EMC IP Holding Company LLC
Inventor： Jianbin Kang , Jian Gao , Jibing Dong , Ruiyong Jia , Xinlei Xu , Xiongcheng Li
Abstract: Techniques detect incomplete write of data. The techniques involve obtaining metadata associated with a sector in a parity disk of a Redundancy Array of Independent Disks (RAID), wherein the metadata includes a sequence stamp and a partial write flag, the sequence stamp changing with a write operation on a stripe to which the sector belongs, and the partial write flag indicating whether the stripe is partially written. The techniques further involve determining whether incomplete write of data is present in the RAID based on the metadata, and the techniques further involve in response to determining the incomplete write of the data being present in the RAID, rebuilding at least one disk in the RAID. By adding a sequence stamp and a partial write flag in the metadata of the sector of the RAID, incomplete write of data can be detected more accurately, thereby improving the reliability of RAID.
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公开(公告)号：US20210240731A1
公开(公告)日：2021-08-05
申请号：US17235821
申请日：2021-04-20
Applicant: Elasticsearch B.V.
Inventor： Boaz Leskes
Abstract: Methods and systems for cross cluster replication are provided. Exemplary methods include: periodically requesting by a follower cluster history from a leader cluster, the history including at least one operation and sequence number pair, the operation having changed data in a primary shard of the leader cluster; receiving history and a first global checkpoint from the leader cluster; when a difference between the first global checkpoint and a second global checkpoint exceeds a user-defined value, concurrently making multiple additional requests for history from the leader cluster; and when a difference between the first global checkpoint and the second global checkpoint is less than a user-defined value, executing the at least one operation, the at least one operation changing data in a primary shard of the follower cluster, such that an index of the follower cluster replicates an index of the leader cluster.
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公开(公告)号：US10776139B2
公开(公告)日：2020-09-15
申请号：US15564314
申请日：2015-05-29
Applicant: MITSUBISHI ELECTRIC CORPORATION
Inventor： Tetsuya Takeo
Abstract: In a simulation apparatus (100), a selection unit (101) repetitively selects context information individually generated for each of a plurality of cores and indicating an instruction to be executed by a corresponding one of the plurality of cores. A simulation unit (102) simulates execution of the instruction indicated by the context information of a core during a period from when the context information of the core is selected by the selection unit (101) till when the context information of another core is selected by the selection unit (101). An adjustment unit (103) refers to definition information (251) to individually define a length of the period for at least one or some instructions. If the instruction whose execution is to be simulated by the simulation unit (102) is the at least one or some instructions, then after the context information of a core to execute the at least one or some instructions is selected by the selection unit (101), the adjustment unit (103) adjusts a timing for causing the selection unit (101) to select the context information of another core according to the definition information (251) that is referred to.
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公开(公告)号：US10698804B1
公开(公告)日：2020-06-30
申请号：US16259909
申请日：2019-01-28
Applicant: FUJITSU LIMITED
Inventor： Erick Bauman , Praveen Murthy
Abstract: According to an aspect of an embodiment, a method of identifying inputs for automated computer-program testing operations may include obtaining a first input for a computer-readable program that is used during execution of the computer-readable program to cause the computer-readable program to take a first path during execution of the computer-readable program. The method may also include obtaining a second input for the computer-readable program that is used during execution of the computer-readable program to cause the computer-readable program to take a second path during execution of the computer-readable program. The method may also include identifying a sequence of values that is common to both the first input and the second input. The method may also include generating a third input that includes the sequence of values and a new value, the third input configured to be used during execution of the computer-readable program.
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公开(公告)号：US10585668B2
公开(公告)日：2020-03-10
申请号：US15722938
申请日：2017-10-02
Applicant: International Business Machines Corporation
Inventor： Abhishek Bansal , Nitin P. Gupta , Brad L. Herold , Jayakumar N. Sankarannair
Abstract: A process for processor testing includes generating a set of test instructions having a first portion and a second portion. A first branch instruction is randomly generated for the first portion where the first branch instruction branches to a respective instruction in a second portion by a branching location offset. A second branch instruction is randomly generated for the second portion where the second branch instruction branches to a respective instruction in the first portion by the branching location offset. If additional instructions are to be added to the set of test instructions, a value of the branching location offset is incrementing by a predetermined amount.
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