公开(公告)号：US09519946B2

公开(公告)日：2016-12-13

申请号：US14810963

申请日：2015-07-28

Applicant: Intel Corporation

Inventor： Nikos Kaburlasos ,  Eric C. Samson ,  Robert B. Taylor

IPC: G06F13/14 ,  G06T1/20 ,  G06T1/00 ,  G06T1/60 ,  G09G5/00 ,  G09G5/395 ,  G09G5/36

CPC classification number: G06T1/20 ,  G06T1/00 ,  G06T1/60 ,  G09G5/001 ,  G09G5/363 ,  G09G5/395 ,  G09G2330/021 ,  G09G2360/08 ,  G09G2360/122 ,  G09G2360/18

Abstract: In accordance with some embodiments, partial rendering of non-changing or slowly changing frame tiles allows the graphics processing unit to spend less time processing non-changing or slowly changing portions of each frame, saving power and creating more room for performance in some embodiments.

公开(公告)号：US20160335020A1

公开(公告)日：2016-11-17

申请号：US15219183

申请日：2016-07-25

Applicant: Intel Corporation

Inventor： Inder M. Sodhi ,  Alon Naveh ,  Doron Rajway ,  Ryan D. Wells ,  Eric C. Samson

IPC: G06F3/06

CPC classification number: G06F3/0625 ,  G06F1/3206 ,  G06F1/3278 ,  G06F1/3287 ,  G06F3/0634 ,  G06F3/0673 ,  Y02D10/157 ,  Y02D10/171

Abstract: Embodiments of systems, apparatuses, and methods for energy efficiency and energy conservation including enabling autonomous hardware-based deep power down of devices are described. In one embodiment, a system includes a device, a static memory, and a power control unit coupled with the device and the static memory. The system further includes a deep power down logic of the power control unit to monitor a status of the device, and to transfer the device to a deep power down state when the device is idle. In the system, the device consumes less power when in the deep power down state than in the idle state.

Abstract translation: 描述了能量效率和能量节约的系统，装置和方法的实施例，包括实现设备的自主的基于硬件的深度断电。 在一个实施例中，系统包括与设备和静态存储器耦合的设备，静态存储器和功率控制单元。 该系统还包括功率控制单元的深度掉电逻辑，用于监视设备的状态，并且当设备空闲时将设备传送到深度断电状态。 在系统中，当处于深功率关闭状态时，器件消耗的功率小于空闲状态。

公开(公告)号：US20160225120A1

公开(公告)日：2016-08-04

申请号：US14993421

申请日：2016-01-12

Applicant: Intel Corporation

Inventor： Nikos Kaburlasos ,  Eric C. Samson ,  Altug Koker

IPC: G06T1/20

CPC classification number: G06T1/20

Abstract: According to some embodiments, performance bottlenecks that arise in particular resources within a graphic processor unit may be alleviated by dynamically rebalancing workloads among the resources, with the goal of removing the current performance bottleneck, while at the same time maintaining power dissipation within a currently allocated power budget. In some embodiments this may be achieved by defining a separate clock domain for each of the plurality of graphics processor resources whose performance may then be rebalanced.

Abstract translation: 根据一些实施例，可以通过动态地重新平衡资源之间的工作负载来缓解在图形处理器单元内的特定资源中出现的性能瓶颈，目的是消除当前的性能瓶颈，同时保持当前分配的 电力预算 在一些实施例中，这可以通过为多个图形处理器资源中的每个图形处理器资源定义单独的时钟域来实现，其中性能可以被重新平衡。

公开(公告)号：US09269120B2

公开(公告)日：2016-02-23

申请号：US13669576

申请日：2012-11-06

Applicant: Intel Corporation

Inventor： Nikos Kaburlasos ,  Eric C. Samson ,  Altug Koker

IPC: G06T1/20 ,  G06T1/00 ,  G06F15/00

CPC classification number: G06T1/20

Abstract: According to some embodiments, performance bottlenecks that arise in particular resources within a graphic processor unit may be alleviated by dynamically rebalancing workloads among the resources, with the goal of removing the current performance bottleneck, while at the same time maintaining power dissipation within a currently allocated power budget. In some embodiments this may be achieved by defining a separate clock domain for each of the plurality of graphics processor resources whose performance may then be rebalanced.

Abstract translation: 根据一些实施例，可以通过动态地重新平衡资源之间的工作负载来缓解在图形处理器单元内的特定资源中出现的性能瓶颈，目的是消除当前的性能瓶颈，同时保持当前分配的 电力预算 在一些实施例中，这可以通过为多个图形处理器资源中的每个图形处理器资源定义单独的时钟域来实现，其中性能可以被重新平衡。

公开(公告)号：US08850254B2

公开(公告)日：2014-09-30

申请号：US13939707

申请日：2013-07-11

Applicant: Intel Corporation

Inventor： Eric C. Samson ,  Aditya Navale

IPC: G06F1/32

CPC classification number: G06F1/3296 ,  G06F1/3218 ,  G06F1/3237 ,  G06F1/324 ,  Y02D10/126 ,  Y02D10/128 ,  Y02D10/172 ,  Y02D50/20

Abstract: A method includes detecting a trigger condition, and in response to detecting the trigger condition, reducing a voltage applied to a graphics controller component of a memory controller. The reduction in voltage may cause the voltage to be reduced below a voltage level required to maintain context information in the graphics controller component.

Abstract translation: 一种方法包括检测触发条件，并且响应于检测到触发条件，降低施加到存储器控制器的图形控制器组件的电压。 电压的降低可能导致电压降低到维持图形控制器组件内的上下文信息所需的电压水平。