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公开(公告)号:US20200273776A1
公开(公告)日:2020-08-27
申请号:US16287728
申请日:2019-02-27
Applicant: Intel Corporation
Inventor: Cheng Xu , Junnan Zhao , Zhimin Wan , Ying Wang , Yikang Deng , Chong Zhang , Jiwei Sun , Zhenguo Jiang , Kyu-Oh Lee
IPC: H01L23/467 , H05K1/18 , H05K1/02 , H05K3/32 , H01L23/473 , H01L23/31 , H01L23/66
Abstract: An integrated circuit package may be formed having a heat transfer fluid chamber, wherein the heat transfer fluid chamber may be positioned to allow a heat transfer fluid to directly contact an integrated circuit device within the integrated circuit package. In one embodiment, a first surface of the integrated circuit device may be electrically attached to a first substrate. The first substrate may then may be electrically attached to a second substrate, such that the integrated circuit device is between the first substrate and the second substrate. The second substrate may include a cavity, wherein the heat transfer fluid chamber may be formed between a second surface of the integrated circuit device and the cavity of the second substrate. Thus, at least a portion of a second surface of the integrated circuit device is exposed to the heat transfer fluid which flows into the heat transfer fluid chamber.
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公开(公告)号:US20200185300A1
公开(公告)日:2020-06-11
申请号:US16215237
申请日:2018-12-10
Applicant: INTEL CORPORATION
Inventor: Cheng Xu , Zhimin Wan , Lingtao Liu , Yikang Deng , Junnan Zhao , Chandra Mohan Jha , Kyu-oh Lee
IPC: H01L23/367 , H01L23/538 , H01L21/48 , H01L23/00 , H01L25/065 , H01L25/00
Abstract: An integrated circuit (IC) package comprises a substrate comprising a dielectric and a thermal conduit that is embedded within the dielectric. The thermal conduit has a length that extends laterally within the dielectric from a first end to a second end. An IC die is thermally coupled to the first end of the thermal conduit. The IC die comprises an interconnect that is coupled to the first end of the thermal conduit. An integrated heat spreader comprises a lid over the IC die and at least one sidewall extending from the edge of the lid to the substrate that is thermally coupled to the second end of the thermal conduit.
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公开(公告)号:US20200168384A1
公开(公告)日:2020-05-28
申请号:US16637006
申请日:2017-09-28
Applicant: Intel Corporation
Inventor: Junnan Zhao , Ying Wang , Cheng Xu , Kyu Oh Lee , Sheng Li , Yikang Deng
IPC: H01F17/00 , H01F27/255
Abstract: Described herein are magnetic core inductors (MCI) and methods for manufacturing magnetic core inductors. A first embodiment of the MCI can be a snake-configuration MCI. The snake-configuration MCI can be formed by creating an opening in a base material, such as copper, and providing a nonconductive magnetic material in the opening. The inductor can be further formed by forming plated through holes into the core material. The conductive elements for the inductor can be formed in the plated through holes. The nonconductive magnetic material surrounds each conductive element and plated through hole. In embodiments, a layered coil inductor can be formed by drilling a laminate to form a cavity through the laminate within the metal rings of the layered coil inductor. The nonconductive magnetic material can be provided in the cavity.
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公开(公告)号:US20200027728A1
公开(公告)日:2020-01-23
申请号:US16042203
申请日:2018-07-23
Applicant: Intel Corporation
Inventor: Ying Wang , Chong Zhang , Meizi Jiao , Junnan Zhao , Cheng Xu , Yikang Deng
IPC: H01L21/02 , H01L21/768 , H01L23/522 , H01L23/00
Abstract: Embodiments may relate to a semiconductor package that includes a die and a glass core coupled with the die. The glass core may include a cavity with an interconnect structure therein. The interconnect structure may include pads on a first side that are coupled with the die, and pads on a second side opposite the first side. Other embodiments may be described and/or claimed.
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55.
公开(公告)号:US10373951B1
公开(公告)日:2019-08-06
申请号:US16017247
申请日:2018-06-25
Applicant: Intel Corporation
Inventor: Cheng Xu , Rahul Jain , Seo Young Kim , Kyu Oh Lee , Ji Yong Park , Sai Vadlamani , Junnan Zhao
IPC: H01L27/07 , H01L23/64 , H01L23/522 , H01L23/00 , H01L49/02
Abstract: Disclosed embodiments include an embedded thin-film capacitor and a magnetic inductor that are assembled in two adjacent build-up layers of a semiconductor package substrate. The thin-film capacitor is seated on a surface of a first of the build-up layers and the magnetic inductor is partially disposed in a recess in the adjacent build up layer. The embedded thin-film capacitor and the integral magnetic inductor are configured within a die shadow that is on a die side of the semiconductor package substrate.
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