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    MEMORY ENCRYPTION EXCLUSION METHOD AND APPARATUS
    52.
    发明申请
    MEMORY ENCRYPTION EXCLUSION METHOD AND APPARATUS 审中-公开
    内存加密排除方法和设备

    公开(公告)号：US20160378686A1

    公开(公告)日：2016-12-29

    申请号：US14749301

    申请日：2015-06-24

    Applicant: Intel Corporation

    Inventor： Nicholas J. Adams ,  Vincent J. Zimmer ,  Baiju V. Patel ,  Rajesh Poornachandran

    IPC: G06F12/14 ,  G06F21/57

    CPC classification number: G06F12/1408 ,  G06F8/654 ,  G06F9/4401 ,  G06F12/1441 ,  G06F21/572 ,  G06F21/575 ,  G06F2212/1052

    Abstract: Apparatuses, methods and storage medium associated with memory encryption exclusion are disclosed herein. In embodiments, an apparatus may include one or more processors, memory, and firmware to provide basic input/output services to an operating system. Additionally, the apparatus may include a memory controller to control access to the memory, wherein the memory controller includes an encryption engine to encrypt data, using an encryption key, before the data are stored into an encrypted area of the memory, wherein the encryption engine regenerates the encryption key on a reset transferring execution from the operating system operated by the one or more processors to a pre-boot phase of the firmware. Further, the apparatus may include one or more storage locations to store one or more memory parameters to set aside one or more ranges of the memory as one or more encryption excluded areas. Other embodiments may be described and/or claimed.

    Abstract translation: 本文公开了与存储器加密排除相关联的装置，方法和存储介质。 在实施例中，设备可以包括一个或多个处理器，存储器和固件，以向操作系统提供基本的输入/输出服务。 此外，该装置可以包括控制对存储器的访问的存储器控​​制器，其中存储器控制器在数据被存储到存储器的加密区域之前，使用加密密钥来加密数据的加密引擎，其中加密引擎 在从一个或多个处理器操作的操作系统的复位传送执行到固件的启动前阶段，重新生成加密密钥。 此外，设备可以包括一个或多个存储位置，以存储一个或多个存储器参数，以将存储器的一个或多个范围放置为一个或多个加密排除区域。 可以描述和/或要求保护其他实施例。

    ENHANCED SECURITY OF POWER MANAGEMENT COMMUNICATIONS AND PROTECTION FROM SIDE CHANNEL ATTACKS
    53.
    发明申请
    ENHANCED SECURITY OF POWER MANAGEMENT COMMUNICATIONS AND PROTECTION FROM SIDE CHANNEL ATTACKS 有权
    电力管理通信的增强安全和边界通道攻击的保护

    公开(公告)号：US20160371487A1

    公开(公告)日：2016-12-22

    申请号：US14740639

    申请日：2015-06-16

    Applicant: Intel Corporation

    Inventor： Rajesh Poornachandran ,  Ned M. Smith

    IPC: G06F21/55 ,  G06F21/57

    CPC classification number: G06F21/554 ,  G06F21/575 ,  G06F21/755 ,  G06F2221/034

    Abstract: Systems, apparatuses and methods may provide for detecting a request to access a power management register and conducting, via a power management security interface, a runtime credential exchange with a source of the request. Additionally, the request may be denied if the runtime credential exchange is unsuccessful. In one example, a plug event is detected, via a dedicated side channel, with respect to a debug port. A noise analysis may be conducted of one or more power rails in response to the plug event, wherein policy based counter noise may be generated on at least one of the one or more power rails at runtime if the noise analysis identifies a potential security attack.

    Abstract translation: 系统，装置和方法可以提供用于检测访问功率管理寄存器的请求，并且经由功率管理安全接口执行与请求的源的运行时凭证交换。 此外，如果运行时凭据交换失败，则可能会拒绝该请求。 在一个示例中，通过专用侧​​信道相对于调试端口检测到插塞事件。 响应于插头事件，可以对一个或多个电源轨进行噪声分析，其中如果噪声分析识别潜在的安全攻击，则可以在运行时的一个或多个电力轨的至少一个上生成基于策略的计数器噪声。

    TECHNOLOGIES FOR LOW-POWER STANDBY DISPLAY REFRESH
    54.
    发明申请
    TECHNOLOGIES FOR LOW-POWER STANDBY DISPLAY REFRESH 有权
    低功耗STANDBY显示刷新技术

    公开(公告)号：US20160267883A1

    公开(公告)日：2016-09-15

    申请号：US14644767

    申请日：2015-03-11

    Applicant: Intel Corporation

    Inventor： Vasudev Bibikar ,  Rajesh Poornachandran ,  Ajaya V. Durg ,  Arpit Shah ,  Anil K. Sabbavarapu ,  Nabil F. Kerkiz ,  Quang T. Le ,  Ryan R. Pinto ,  Moorthy Rajesh ,  James A. Bish ,  Ranjani Sridharan

    IPC: G09G5/36 ,  G09G5/395 ,  G09G5/00 ,  G09G5/393

    CPC classification number: G09G5/36 ,  G09G5/39 ,  G09G5/395 ,  G09G2320/103 ,  G09G2330/021 ,  G09G2360/121 ,  G09G2360/125

    Abstract: Technologies for low-power display refresh standby include a computing device with a display such as an LCD panel. The computing device may include a system-on-a-chip (SoC) with a processor, I/O subsystem, display controller, and memory. When the computing device determines that a display image is static, the computing device enters a low-power display refresh standby mode, powering down unneeded components of the SoC such as processor cores, peripheral devices, and memory other than a dedicated display buffer. The display controller may access the dedicated display buffer via the I/O subsystem and output the image to the display. The computing device may power down the I/O subsystem and the dedicated display buffer when a display controller FIFO is full of image data, and periodically power on the I/O subsystem and display buffer to fill the display controller FIFO. Other embodiments are described and claimed.

    Abstract translation: 用于低功率显示刷新待机的技术包括具有诸如LCD面板的显示器的计算设备。 计算设备可以包括具有处理器，I / O子系统，显示控制器和存储器的片上系统（SoC）。 当计算设备确定显示图像是静态时，计算设备进入低功率显示刷新待机模式，为诸如处理器核心，外围设备和专用显示缓冲器之外的存储器的SoC的不需要的组件供电。 显示控制器可以通过I / O子系统访问专用显示缓冲区，并将图像输出到显示器。 当显示控制器FIFO充满图像数据时，计算设备可能会关闭I / O子系统和专用显示缓冲区，并周期性地打开I / O子系统和显示缓冲区以填充显示控制器FIFO。 描述和要求保护其他实施例。

    Method, apparatus and system for mapping a course of a mobile device
    56.
    发明授权
    Method, apparatus and system for mapping a course of a mobile device 有权
    用于映射移动设备的过程的方法，装置和系统

    公开(公告)号：US09182240B2

    公开(公告)日：2015-11-10

    申请号：US13627950

    申请日：2012-09-26

    Applicant: Intel Corporation

    Inventor： Rajesh Poornachandran ,  Uttam Sengupta ,  Rajasekaran Andiappan

    IPC: G01C21/16 ,  G01C21/20 ,  G01S7/484

    CPC classification number: G01C21/206 ,  G01C21/16

    Abstract: Techniques and mechanisms for providing information to represent a course traversed by a mobile device. In an embodiment, navigation logic of the mobile device determines context data other than any geodetic data that specifies a position of the mobile device. With such context data, the navigation logic determines a sequence of estimates each for a respective position of the device on a course traversed by the mobile device. In another embodiment, determining the sequence of estimates includes determining a first estimate of a first position of the mobile device independent of any geodetic data that specifies the first position. Course information representing such a determined sequence includes timestamp information for the first estimate.

    Abstract translation: 用于提供信息以表示由移动设备遍历的过程的技术和机制。 在一个实施例中，移动设备的导航逻辑确定除了指定移动设备的位置的任何大地测量数据之外的上下文数据。 利用这样的上下文数据，导航逻辑确定在由移动设备遍历的过程中针对设备的相应位置的每个估计序列。 在另一个实施例中，确定估计序列包括确定移动设备的第一位置的第一估计，而与指定第一位置的任何大地测量数据无关。 表示这样确定的序列的课程信息包括用于第一估计的时间戳信息。

    Communication link and network connectivity management in low power mode
    57.
    发明授权
    Communication link and network connectivity management in low power mode 有权
    低功耗模式下的通信链路和网络连接管理

    公开(公告)号：US09026820B2

    公开(公告)日：2015-05-05

    申请号：US13730921

    申请日：2012-12-29

    Applicant: Intel Corporation

    Inventor： James F. Bodio ,  Gyan Prakash ,  Rajesh Poornachandran ,  Saurabh Dadu

    IPC: G06F1/26 ,  G06F1/32

    CPC classification number: G06F1/3203 ,  G06F1/3243 ,  H04L67/30 ,  H04W52/0225 ,  H04W52/0251 ,  H04W52/028 ,  Y02D10/152 ,  Y02D70/1222 ,  Y02D70/1262 ,  Y02D70/142

    Abstract: Methods and apparatus relating to communication link and network connectivity management in low power mode are described. In one embodiment, logic manages one or more external communication network links (also referred as “links”) in response to a determination that a processor has entered a low power consumption state and based on policy information. The logic also blocks/intercepts one or more signals, corresponding to management of the one or more links, that are directed to the processor to allow the processor to stay in the low power consumption. Other embodiments are also claimed and disclosed.

    Abstract translation: 描述了与低功率模式下的通信链路和网络连接管理相关的方法和装置。 在一个实施例中，响应于处理器已经进入低功耗状态并且基于策略信息的确定，逻辑管理一个或多个外部通信网络链路（也称为“链路”）。 逻辑还阻止/拦截对应于一个或多个链路的管理的一个或多个信号，其被引导到处理器以允许处理器保持低功耗。 还要求和公开其它实施例。

    Autonomous machine knowledge transfer
    60.
    发明授权
    Autonomous machine knowledge transfer 有权

    公开(公告)号：US12210941B2

    公开(公告)日：2025-01-28

    申请号：US17129981

    申请日：2020-12-22

    Applicant: Intel Corporation

    Inventor： Rajesh Poornachandran ,  Vinayak Honkote ,  Rita H. Wouhaybi ,  Omesh Tickoo

    IPC: G05B13/02 ,  G06N20/00

    Abstract: A controller for an automated machine may include including: one or more processors configured to: determine that a group affiliation of the automated machine switched from a first group of automated machines to a second group of automated machines, the first group of automated machines being assigned to one or more first tasks, the second group of automated machines being assigned to one or more second tasks; generate a message for one or more network devices of the second group of automated machines in accordance with a communication protocol, the message including information about a task performing model of the automated machine, the task performing model being based on a result of performing at least one task of the one or more first tasks by the automated machine.

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