公开(公告)号：US20060049514A1

公开(公告)日：2006-03-09

申请号：US11153097

申请日：2005-06-15

Applicant: Sven Fuchs ,  Mark Pavier

Inventor： Sven Fuchs ,  Mark Pavier

IPC: H01L23/02 ,  H01L23/34

CPC classification number: H01L23/10 ,  H01L23/041 ,  H01L24/02 ,  H01L24/11 ,  H01L2224/0401 ,  H01L2224/13099 ,  H01L2224/32245 ,  H01L2224/73153 ,  H01L2224/73253 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01068 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01088 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/13033 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/16152 ,  H01L2924/00

Abstract: A semiconductor device that includes an electrode of one material and a conductive material of lower resistivity formed over the electrode and a process for fabricating the semiconductor device.

公开(公告)号：US20050272257A1

公开(公告)日：2005-12-08

申请号：US11144483

申请日：2005-06-02

Applicant: Sven Fuchs ,  Mark Pavier

Inventor： Sven Fuchs ,  Mark Pavier

IPC: H01L21/4763 ,  H01L21/60 ,  H01L23/04 ,  H01L23/10 ,  H01L23/34 ,  H01L23/485

CPC classification number: H01L23/10 ,  H01L23/041 ,  H01L24/02 ,  H01L24/11 ,  H01L2224/0401 ,  H01L2224/13099 ,  H01L2224/32245 ,  H01L2224/73153 ,  H01L2224/73253 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01068 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01088 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/13033 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/16152 ,  H01L2924/00

Abstract: A semiconductor device that includes an electrode of one material and a conductive material of lower resistivity formed over the electrode and a process for fabricating the semiconductor device.

Abstract translation: 一种半导体器件，其包括在电极上形成的一种材料的电极和具有较低电阻率的导电材料，以及制造该半导体器件的工艺。

公开(公告)号：US20050151236A1

公开(公告)日：2005-07-14

申请号：US10988443

申请日：2004-11-12

Applicant: Stephen Oliver ,  Marco Soldano ,  Mark Pavier ,  Glyn Connah ,  Ajit Dubhashi

Inventor： Stephen Oliver ,  Marco Soldano ,  Mark Pavier ,  Glyn Connah ,  Ajit Dubhashi

IPC: H01L23/495 ,  H01L23/48 ,  H01L21/44

CPC classification number: H01L24/06 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/0603 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48599 ,  H01L2224/48647 ,  H01L2224/48699 ,  H01L2224/48747 ,  H01L2224/4903 ,  H01L2224/49051 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/85207 ,  H01L2224/85447 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A low profile semiconductor device package includes a lead frame with terminal leads and two die pads for receiving at least two semiconductor die that are interconnected to form a circuit. A further low profile semiconductor device package includes a lead frame with two die pads for receiving at least two semiconductor die that are interconnected to form a circuit and also has a reduced height through removal of a mounting tab. An example of such device packages is a package that includes first and second MOSFET die, each connected to a respective die pad. The source of one MOSFET is connected to the drain of the other MOSFET, thereby forming a low profile device package that provides a half-bridge circuit. Other example device packages include different arrangements of two interconnected MOSFET die, two interconnected IGBTs, or a combination of a MOSFET die and a diode.

Abstract translation: 低剖面半导体器件封装包括具有端子引线的引线框架和用于接收互连以形成电路的至少两个半导体管芯的两个管芯焊盘。 进一步的低调半导体器件封装包括具有两个管芯焊盘的引线框架，用于接收至少两个互连以形成电路的半导体管芯，并且还通过移除安装突片而具有减小的高度。 这种器件封装的示例是包括第一和第二MOSFET管芯的封装，每个MOSFET管芯连接到相应的管芯焊盘。 一个MOSFET的源极连接到另一个MOSFET的漏极，从而形成提供半桥电路的低剖面器件封装。 其他示例性器件封装包括两个互连的MOSFET管芯，两个互连的IGBT或MOSFET管芯和二极管的组合的不同布置。

公开(公告)号：US20050133902A1

公开(公告)日：2005-06-23

申请号：US10987697

申请日：2004-11-12

Applicant: Mark Pavier ,  Ajit Dubhashi ,  Jorge Cerezo ,  Leigh Cormie ,  Vijay Bolloju

Inventor： Mark Pavier ,  Ajit Dubhashi ,  Jorge Cerezo ,  Leigh Cormie ,  Vijay Bolloju

IPC: H01L23/495 ,  H01L23/52

CPC classification number: H01L24/49 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/48 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49111 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01031 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/05599

Abstract: A semiconductor package that includes two semiconductor die each disposed on a respective die pad and a large tracking distance interposed between at least two leads of the package for better creepage characteristics.

Abstract translation: 一种半导体封装，其包括两个半导体管芯，每个半导体管芯设置在相应的管芯焊盘上，并且具有大的跟踪距离，插入在封装的至少两个引线之间，用于更好的爬电特性

公开(公告)号：US06723620B1

公开(公告)日：2004-04-20

申请号：US09718932

申请日：2000-11-22

Applicant: Mark Pavier

Inventor： Mark Pavier

IPC: H01L21301

CPC classification number: H01L21/6836 ,  H01L23/49513 ,  H01L24/27 ,  H01L24/31 ,  H01L24/83 ,  H01L2221/68327 ,  H01L2224/274 ,  H01L2224/2919 ,  H01L2224/83191 ,  H01L2224/83855 ,  H01L2224/83856 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01077 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/12032 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/00

Abstract: A large area adhesive film is attached to a semiconductor wafer containing a large number of identical structures. The film and wafer are then simultaneously singulated and the individual die with film thereon are then placed atop a lead frame and the film is completely cured to adhere the semiconductor die to the lead frame. Plural die can be mounted side-by-side on a common substrate, or one die can be mounted atop a second die which is on the substrate.

Abstract translation: 将大面积的粘合剂膜附着到包含大量相同结构的半导体晶片上。 然后将膜和晶片同时分离，并将其上的膜的单个管芯放置在引线框架的顶部，并且膜完全固化以将半导体管芯粘附到引线框架。 多个模具可以并排安装在公共基板上，或者一个管芯可以安装在基板上的第二管芯顶上。