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公开(公告)号:US20180024745A1
公开(公告)日:2018-01-25
申请号:US15448781
申请日:2017-03-03
Applicant: SK hynix Inc.
Inventor: Jong-Min LEE , Jee-Yul KIM
IPC: G06F3/06
CPC classification number: G06F3/064 , G06F3/061 , G06F3/0679 , G06F11/1004 , G06F11/1068 , G06F12/00 , G06F12/0246 , G06F12/0292 , G06F2212/1016 , G06F2212/7201 , G06F2212/7208
Abstract: A memory system includes: a memory device including a plurality of pages which include a plurality of memory cells coupled to a plurality of word lines and in which data are stored, and a plurality of memory blocks in which the pages are included; and a controller including a memory, and suitable for storing data segments of user data corresponding to a write command received from a host, in pages included in a first memory block and a second memory block among the memory blocks and generating map data corresponding to storage of the data segments by sorting map segments of the map data according to logical informations of the data segments.
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公开(公告)号:US20170177226A1
公开(公告)日:2017-06-22
申请号:US15175860
申请日:2016-06-07
Applicant: SK hynix Inc.
Inventor: Jong-Min LEE
CPC classification number: G06F3/064 , G06F1/3287 , G06F3/0619 , G06F3/0656 , G06F3/0659 , G06F3/0679 , G11C5/148 , G11C29/028 , G11C29/12 , G11C29/42 , G11C29/76 , G11C2029/0407
Abstract: A memory system may include: a memory device including a plurality of pages each having a plurality of memory cells coupled to a plurality of word lines and suitable for storing data, and a plurality of memory blocks each having the pages; and a controller suitable for programming test data to a first memory block among the memory blocks before a first time point, and programming meta-data corresponding to the program of the test data to a second memory block among the memory blocks, in case where the memory system including the memory device is changed from a power-on state to a power-off state at the first time point.
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公开(公告)号:US20170109276A1
公开(公告)日:2017-04-20
申请号:US15068353
申请日:2016-03-11
Applicant: SK hynix Inc.
Inventor: Jong-Min LEE
IPC: G06F12/02
CPC classification number: G06F12/0253 , G06F12/0246 , G06F2212/1044 , G06F2212/7205
Abstract: A memory system includes a memory device comprising a plurality of blocks, and a controller suitable for erasing at least one victim block selected from among the plurality of blocks in a first garbage collection operation, and preparing a second garbage collection operation for one or more other blocks, except for the victim block among the plurality of blocks during a period in which the victim block is erased.
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公开(公告)号:US20160141026A1
公开(公告)日:2016-05-19
申请号:US14678555
申请日:2015-04-03
Applicant: SK hynix Inc.
Inventor: Jong-Min LEE
CPC classification number: G11C11/5642 , G11C11/5628 , G11C16/08 , G11C16/10 , G11C16/26 , G11C2211/5641 , G11C2211/5642 , G11C2211/5643 , G11C2211/5644
Abstract: A memory system includes a memory device including memory blocks, each of the memory blocks including pages, each of the pages including memory cells that are electrically coupled to word lines, wherein the memory cells store data that is requested from a host; and a controller suitable for reading first data corresponding to a read command received from the host, from a page of a first memory block among the memory blocks, storing the first data in a buffer, providing the first data stored in the buffer, to the host, and writing and storing the first data stored in the buffer, in a page of a second memory block among the memory blocks.
Abstract translation: 存储器系统包括存储器件,其包括存储器块,每个存储器块包括页面,每个页面包括电耦合到字线的存储器单元,其中存储器单元存储从主机请求的数据; 以及控制器,适于从存储块中的第一存储块的页面读取与从主机接收到的读取命令相对应的第一数据,将第一数据存储在缓冲器中,将存储在缓冲器中的第一数据提供给 主机,并且将存储在缓冲器中的第一数据写入和存储在存储块中的第二存储器块的页面中。
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55.
公开(公告)号:US20230244408A1
公开(公告)日:2023-08-03
申请号:US18298374
申请日:2023-04-11
Applicant: SK hynix Inc.
Inventor: Jong-Min LEE
IPC: G06F3/06
CPC classification number: G06F3/0652 , G06F3/0673 , G06F3/0608
Abstract: A memory system includes a memory device having a plurality of memory blocks for storing data, and a controller configured to perform an erase operation including plural unit erase operations to erase data stored in at least one target memory block included in the plurality of memory blocks. The controller can be configured to perform at least some of the plural unit erase operations onto the at least one target memory block before the at least one target memory block allocated for storing data.
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56.
公开(公告)号:US20220222188A1
公开(公告)日:2022-07-14
申请号:US17713001
申请日:2022-04-04
Applicant: SK hynix Inc.
Inventor: Jong-Min LEE
Abstract: A data processing system includes a memory system including a memory device storing data and a controller performing a data program operation or a data read operation with the memory device, and a host suitable for requesting the data program operation or the data read operation from the memory system. The controller can perform a serial communication to control a memory which is arranged outside the memory system and engaged with the host.
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57.
公开(公告)号:US20210382647A1
公开(公告)日:2021-12-09
申请号:US17412568
申请日:2021-08-26
Applicant: SK hynix Inc.
Inventor: Jong-Min LEE
IPC: G06F3/06
Abstract: A memory system includes a memory device having a plurality of memory blocks for storing data, and a controller configured to perform an erase operation including plural unit erase operations to erase data stored in at least one target memory block included in the plurality of memory blocks. The controller can be configured to perform at least some of the plural unit erase operations onto the at least one target memory block before the at least one target memory block allocated for storing data.
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公开(公告)号:US20200341890A1
公开(公告)日:2020-10-29
申请号:US16700806
申请日:2019-12-02
Applicant: SK hynix Inc.
Inventor: Jong-Min LEE
Abstract: A memory system includes a memory device including a memory device including a plurality of blocks, each block having a plurality of pages to store data; and a controller suitable for selecting specific memory blocks among the plurality memory blocks, acquiring error bit information of the plurality of pages in each of the specific memory blocks, generating a memory block group management list of each of the specific memory blocks to classify the specific memory blocks into different memory block groups or a same memory block group based on the error bit information, and performing a test read operation on the plurality of pages in each of the plurality of memory blocks based on whether the specific memory blocks are classified into different memory block groups or the same memory block group.
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公开(公告)号:US20200341687A1
公开(公告)日:2020-10-29
申请号:US16717094
申请日:2019-12-17
Applicant: SK hynix Inc.
Inventor: Jong-Min LEE
IPC: G06F3/06
Abstract: A memory system includes a memory device and a controller suitable for controlling the memory device based on read counts for a plurality of pages of the memory device, wherein the controller counts at least one of the read counts in response to a read request, determines whether there is a page whose read count is initialized at every check-pointing period to generate a determination result, and controls the memory device to update the read counts based on the determination result.
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公开(公告)号:US20200226058A1
公开(公告)日:2020-07-16
申请号:US16550364
申请日:2019-08-26
Applicant: SK hynix Inc.
Inventor: Jong-Min LEE
IPC: G06F12/02 , G06F12/1009
Abstract: A memory system includes a memory device including plural memory blocks storing plural pieces of data classified by a first attribute and a second attribute different from the first attribute, and a controller configured to determine whether each data stored in each page in a first part of a target memory block for garbage collection in the memory device has either the first attribute or the second attribute, to determine that all data stored in a second part of the memory block has one of the first attribute and the second attribute, based on a first attribute page count of the memory block and the number of pages storing data of the first attribute in the first part of the memory block, and to migrate data having one of the first attribute and the second attribute to another memory block.
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