Method of manufacturing nitride semiconductor device
    61.
    发明授权
    Method of manufacturing nitride semiconductor device 有权
    氮化物半导体器件的制造方法

    公开(公告)号:US08124497B2

    公开(公告)日:2012-02-28

    申请号:US12955222

    申请日:2010-11-29

    Abstract: A method of manufacturing a nitride semiconductor device is disclosed. The method includes forming a gallium nitride (GaN) epitaxial layer on a first support substrate, forming a second support substrate on the GaN epitaxial layer, forming a passivation layer on a surface of the other region except for the first support substrate, etching the first support substrate by using the passivation layer as a mask, and removing the passivation layer and thereby exposing the second support substrate and the GaN epitaxial layer.

    Abstract translation: 公开了一种制造氮化物半导体器件的方法。 该方法包括在第一支撑衬底上形成氮化镓(GaN)外延层,在GaN外延层上形成第二支撑衬底,在除第一支撑衬底之外的另一个区域的表面上形成钝化层,蚀刻第一衬底 通过使用钝化层作为掩模来支撑衬底,以及去除钝化层,从而暴露第二支撑衬底和GaN外延层。

    RECESS GATE TRANSISTOR
    62.
    发明申请
    RECESS GATE TRANSISTOR 审中-公开
    记忆闸门晶体管

    公开(公告)号:US20120009976A1

    公开(公告)日:2012-01-12

    申请号:US13242724

    申请日:2011-09-23

    CPC classification number: H01L29/4236 H01L29/66621

    Abstract: A method of forming a semiconductor device is provided, comprising forming a plurality of hard masks on a substrate by patterning an insulating layer; forming a plurality of trenches in the substrate, each trench having trench walls disposed between two adjacent masks and extending vertically from a bottom portion to an upper portion; forming an insulating layer on the hard masks and the trench walls; forming a conductive layer on the insulating layer; etching the conductive layer to form conductive layer patterns to fill the bottom portions of the trenches; depositing a buffer layer on the conductive layer patterns and the trench walls; and filling the upper portions of the trenches with a capping layer.

    Abstract translation: 提供一种形成半导体器件的方法,包括:通过图案化绝缘层在衬底上形成多个硬掩模; 在衬底中形成多个沟槽,每个沟槽具有设置在两个相邻掩模之间并且从底部到上部垂直延伸的沟槽壁; 在硬掩模和沟槽壁上形成绝缘层; 在绝缘层上形成导电层; 蚀刻导电层以形成导电层图案以填充沟槽的底部; 在导电层图案和沟槽壁上沉积缓冲层; 以及用覆盖层填充沟槽的上部。

    THIN FILM TRANSISTOR ARRAY PANEL
    63.
    发明申请
    THIN FILM TRANSISTOR ARRAY PANEL 有权
    薄膜晶体管阵列

    公开(公告)号:US20120007082A1

    公开(公告)日:2012-01-12

    申请号:US13072962

    申请日:2011-03-28

    CPC classification number: H01L27/124 H01L27/1214 H01L27/1248

    Abstract: A thin film transistor array panel includes an insulating substrate, a plurality of pixel electrodes arranged on the insulating substrate in rows and columns, a plurality of thin film transistors connected with the plurality of pixel electrodes, respectively, and a plurality of gate lines and a plurality of data lines connected with the plurality of thin film transistors. When one data line and one pixel electrode which are connected with a single thin film transistor are referred to as a connected data line and a connected pixel electrode, respectively, the plurality of thin film transistors are positioned on a same side of the connected data line in two adjacent rows, and on alternating sides of the connected data line in every other two adjacent rows. Two boundary lines of the connected pixel electrode are overlapped with the connected data line.

    Abstract translation: 薄膜晶体管阵列面板包括绝缘基板,以行和列布置在绝缘基板上的多个像素电极,分别与多个像素电极连接的多个薄膜晶体管,以及多个栅极线和 多个数据线与多个薄膜晶体管连接。 将与单个薄膜晶体管连接的一个数据线和一个像素电极分别称为连接的数据线和连接的像素电极时,多个薄膜晶体管位于连接的数据线的同一侧 在两个相邻的行中,并且在每隔一个两个相邻行中连接的数据线的交替侧。 连接的像素电极的两条边界线与连接的数据线重叠。

    COMPOUND SEMICONDUCTOR SUBSTRATE GROWN ON METAL LAYER, METHOD OF MANUFACTURING THE SAME, AND COMPOUND SEMICONDUCTOR DEVICE USING THE SAME
    65.
    发明申请
    COMPOUND SEMICONDUCTOR SUBSTRATE GROWN ON METAL LAYER, METHOD OF MANUFACTURING THE SAME, AND COMPOUND SEMICONDUCTOR DEVICE USING THE SAME 有权
    金属层上形成的化合物半导体基板,其制造方法以及使用其的化合物半导体器件

    公开(公告)号:US20110092055A1

    公开(公告)日:2011-04-21

    申请号:US12967897

    申请日:2010-12-14

    Abstract: The present invention relates to a compound semiconductor substrate and a method for manufacturing the same. The present invention provides the manufacturing method which coats spherical balls on a substrate, forms a metal layer between the spherical balls, removes the spherical balls to form openings, and grows a compound semiconductor layer from the openings. According to the present invention, the manufacturing method can be simplified and grow a high quality compound semiconductor layer rapidly, simply and inexpensively, as compared with a conventional ELO (Epitaxial Lateral Overgrowth) method or a method for forming a compound semiconductor layer on a metal layer. And, the metal layer serves as one electrode of a light emitting device and a light reflecting film to provide a light emitting device having reduced power consumption and high light emitting efficiency.

    Abstract translation: 化合物半导体基板及其制造方法技术领域本发明涉及化合物半导体基板及其制造方法。 本发明提供一种制造方法,其在基板上涂布球形球,在球形球之间形成金属层,去除球形球以形成开口,并从开口生长化合物半导体层。 根据本发明,与传统的ELO(外延横向生长)方法或在金属上形成化合物半导体层的方法相比,可以简化和简单且廉价地生产高质量的化合物半导体层 层。 并且,金属层用作发光器件和光反射膜的一个电极,以提供具有降低的功率消耗和高发光效率的发光器件。

    THIN FILM TRANSISTOR ARRAY SUBSTRATE FOR A DISPLAY PANEL AND A METHOD FOR MANUFACTURING A THIN FILM TRANSISTOR ARRAY SUBSTRATE FOR A DISPLAY PANEL
    68.
    发明申请
    THIN FILM TRANSISTOR ARRAY SUBSTRATE FOR A DISPLAY PANEL AND A METHOD FOR MANUFACTURING A THIN FILM TRANSISTOR ARRAY SUBSTRATE FOR A DISPLAY PANEL 有权
    用于显示面板的薄膜晶体管阵列基板和用于制造用于显示面板的薄膜晶体管阵列基板的方法

    公开(公告)号:US20100308333A1

    公开(公告)日:2010-12-09

    申请号:US12560652

    申请日:2009-09-16

    CPC classification number: H01L27/1288 H01L27/1214 H01L27/124 H01L27/1248

    Abstract: A method of manufacturing a thin film transistor capable of simplifying a substrate structure and a manufacturing process is disclosed. The method of manufacturing a thin film transistor array substrate comprising a three mask process. The 3 mask process comprising, forming a gate pattern on a substrate, forming a gate insulating film on the substrate, forming a source/drain pattern and a semiconductor pattern on the substrate, forming a first, second, and third passivation film successively on the substrate. Over the above multi-layers of the passivation film forming a first photoresist pattern comprising a first portion formed on part of the drain electrode and on the pixel region, and a second portion wherein, the second portion thicker than the first portion, and then patterning the third passivation film using the first photoresist pattern, forming a second photoresist pattern by removing the first portion of the first photoresist pattern, forming a transparent electrode film on the substrate, removing the second photoresist pattern and the transparent electrode film disposed on the second photoresist pattern; and forming a transparent electrode pattern on the second passivation layer.

    Abstract translation: 公开了一种能够简化衬底结构和制造工艺的制造薄膜晶体管的方法。 制造包括三掩模工艺的薄膜晶体管阵列基板的方法。 3掩模工艺包括:在衬底上形成栅极图案,在衬底上形成栅极绝缘膜,在衬底上形成源极/漏极图案和半导体图案,在第一,第二和第三钝化膜上依次形成第一,第二和第三钝化膜 基质。 在上述多层钝化膜上形成第一光致抗蚀剂图案,该第一光致抗蚀剂图案包括形成在漏电极的一部分上和在像素区域上的第一部分,以及第二部分,其中第二部分比第一部分厚, 使用第一光致抗蚀剂图案的第三钝化膜,通过去除第一光致抗蚀剂图案的第一部分形成第二光致抗蚀剂图案,在基板上形成透明电极膜,去除第二光致抗蚀剂图案和设置在第二光致抗蚀剂上的透明电极膜 模式; 以及在所述第二钝化层上形成透明电极图案。

    Method for preparing compound semiconductor substrate
    69.
    发明授权
    Method for preparing compound semiconductor substrate 有权
    化合物半导体衬底的制备方法

    公开(公告)号:US07816241B2

    公开(公告)日:2010-10-19

    申请号:US12177917

    申请日:2008-07-23

    Abstract: Provided is a method for preparing a compound semiconductor substrate. The method includes coating a plurality of spherical balls on a substrate, growing a compound semiconductor epitaxial layer on the substrate coated with the spherical balls while allowing voids to be formed under the spherical balls, and cooling the substrate on which the compound semiconductor epitaxial layer is grown so that the substrate and the compound semiconductor epitaxial layer are self-separated along the voids. The spherical ball treatment can reduce dislocation generations. In addition, because the substrate and the compound semiconductor epitaxial layer are separated through the self-separation, there is no need for laser lift-off process.

    Abstract translation: 提供了一种制备化合物半导体衬底的方法。 该方法包括在基板上涂覆多个球形球,在涂覆有球形球的基材上生长化合物半导体外延层,同时允许在球形球下方形成空隙,并且冷却其上化合物半导体外延层为 生长,使得衬底和化合物半导体外延层沿着空隙自我分离。 球形球处理可以减少错位几代。 此外,由于基板和化合物半导体外延层通过自分离分离,因此不需要激光剥离处理。

    NOISE SILENCER FOR CONSTRUCTION EQUIPMENT
    70.
    发明申请
    NOISE SILENCER FOR CONSTRUCTION EQUIPMENT 审中-公开
    建筑设备噪声防护罩

    公开(公告)号:US20100018798A1

    公开(公告)日:2010-01-28

    申请号:US12504317

    申请日:2009-07-16

    CPC classification number: E02F9/00 E02F9/0866 F01P11/10 F01P11/12

    Abstract: A noise silencer for construction equipment is used to minimize outward propagation of noises generated from an engine room. The noise silencer is mounted in air intake and/or discharge openings of an engine room, and includes a frame mounted in the one of the air intake and discharge openings of the engine room, and noise damping members fixed to the frame at uniform intervals, and each including a first member, which is disposed inside the engine room in a horizontal direction such that cooling air introduced from outside to inside of the engine room by operation of a cooling fan smoothly flows, and a second member, which is integrally formed with the first member and is disposed outside the engine room so as to be inclined upwardly at a predetermined inclination.

    Abstract translation: 用于施工设备的噪声消音器用于使发动机室产生的噪声的向外传播最小化。 噪声消音器安装在发动机室的进气和/或排气口中,并且包括安装在发动机室的进气和排气孔之一中的框架,以及以均匀间隔固定在框架上的噪声阻尼件, 并且每个包括第一构件,其在水平方向上设置在发动机室内部,使得通过冷却风扇的操作从外部到内部引入的冷却空气平稳地流动;以及第二构件,其与 第一构件,并且设置在发动机室的外侧,以便以预定的倾斜向上倾斜。

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